X-ray photon correlation spectroscopy (XPCS) provides access to nanoscale dynamics, yet practical approaches for interpreting its data remain limited. This tutorial presents a systematic framework for XPCS data analysis, illustrated using measurements performed at the NSLS-II CHX beamline. The fundamental concepts of speckle pattern and the intensity autocorrelation function are introduced, followed by ferroelectric case studies demonstrating how polarization switching and phase transition dynamics can be extracted from XPCS measurements. The influence of the probed q-range experimental conditions such as X-ray transmittance is examined for data interpretation. These elements are consolidated into practical guidelines for the reliable analysis of XPCS data.
Organic solar cells based on bulk heterojunction (BHJ) structures have attracted considerable attention because of their low fabrication cost, mechanical flexibility, and compatibility with solution-processing techniques. In BHJ organic photovoltaic devices, nanoscale morphology and crystallinity of the photoactive layer critically influence photovoltaic performance. In this study, the effects of solvent selection and thermal annealing on crystallization evolution and photovoltaic characteristics of P3HT:PCBM organic solar cells were systematically investigated. Three different solvents, including toluene, chlorobenzene (CB), and dichlorobenzene (DCB), were employed for active-layer fabrication, followed by post-thermal annealing treatment. UV–visible absorption spectroscopy revealed solvent-dependent differences in molecular ordering and intermolecular π–π interactions within the active layer. X-ray diffraction analysis confirmed that thermal annealing significantly enhanced crystallinity and lamellar ordering of P3HT domains, particularly for CB-processed films. Electrical characterization demonstrated that solvent evaporation behavior strongly affects photovoltaic performance. Among the investigated devices, the thermally annealed CB-processed device exhibited the highest power conversion efficiency of 1.83% with an enhanced short-circuit current density of 7.057 mA cm⁻². The improved device performance is attributed to optimized crystallization behavior and balanced nanoscale phase separation induced by the moderate evaporation characteristics of CB. In contrast, although DCB-assisted films exhibited relatively strong optical absorption and enhanced crystallinity, excessively slow solvent evaporation likely induced excessive aggregation and coarse phase separation, limiting efficient photovoltaic characteristics. These results demonstrate that solvent engineering combined with thermal annealing is an effective strategy for controlling morphology evolution and crystallization behavior in P3HT:PCBM bulk heterojunction solar cells.
Organic photovoltaics (OPVs) are attractive candidates for sustainable energy conversion due to their flexibility, lowcost processing, and compatibility with large-area fabrication. However, their efficiency is hindered by interfacial defects and vertical phase separation in the active layer, which induce charge imbalance and recombination losses. This work presents an interfacial engineering approach to overcome these limitations in P3HT:PC70BM-based OPVs. Two key strategies were employed: (i) reducing the post-deposition annealing time of the active layer to suppress PC70BM accumulation at the bottom electrode, and (ii) using a DCB:DCM mixed solvent system to regulate solvent evaporation, thereby promoting uniform film formation during PC70BM overlay deposition. Devices fabricated with these optimizations exhibited notable enhancements, achieving short-circuit current density up to 15.83 mA/cm2 and a 58.1% increase in power conversion efficiency compared to control devices. X-ray photoelectron spectroscopy confirmed reduced surface aggregation of PC70BM, while X-ray diffraction indicated improved P3HT crystallinity and molecular ordering. These results highlight the critical role of interfacial and morphological control in enhancing charge separation and transport, offering a practical route toward efficient, reproducible, and stable OPVs.
Crystalline silicon solar cells have attracted great attention for their various advantages, such as the availability of raw materials, high-efficiency potential, and well-established processing sequence. Tunnel oxide passivated contact (TOPCon) solar cells are widely regarded as one of the most prospective candidates for the next generation of high-performance solar cells because an efficiency of 26% has been achieved in small-area solar cells. Compared to n-type TOPCon solar cells, the photo conversion efficiency (PCE) of p-type TOPCon is slightly higher. The highest PCEs of p-type TOPCon and n-type TOPCon solar cells are 26.0% and 25.8%, respectively. Despite the highest efficiency in small-area cells, limited progress has been achieved in p-type TOPCon solar cells for large are due to their lower carrier lifetime and inferior surface passivation with the boron-doped c-Si wafer. Nevertheless, it is of great importance to promoting the p-type TOPCon technology due to its lower price and well-established manufacturing procedures with slight modifications in the PERC solar cells production lines. The progress in different approaches to increase the efficiencies of p-type TOPCon solar cells has been reported in this review article and is expected to set valuable strategies to promote the passivation technology of p-type TOPCon, which could further increase the efficiency of TOPCon solar cells.
We have developed inverted green phosphorescent organic light emitting diodes (OLEDs) using 1,1-bis[(di-4- tolylamino)phenyl]cyclohexane (TAPC) and bis(carbazole-9-yl)biphenyl (CBP) hole transport layers. The driving voltage, current efficiency, power efficiency, and emission characteristics of devices were investigated. While the driving voltage for the same current density was about 1~2 V lower in the devices with the TAPC layer, the maximum luminance was higher in the device with the CBP layer. The maximum current efficiency and power efficiency were 3.2 and 2.7 times higher in the device with the CBP layer, respectively. The higher efficiency in the CBP device resulted from the enhanced hole-electron balance although weak parasitic recombination takes place in the CBP hole transport layer.
p-type Tunnel Oxide Passivating Contacts (TOPCon) solar cell is fabricated with a poly-Si/SiOx structure. It simultaneously achieves surface passivation and enhances the carriers’ selective collection, which is a promising technology for conventional solar cells. The quality of passivation is depended on the quality of the tunnel oxide layer at the interface with the c-Si wafer, which is affected by the bond of SiO formed during the subsequent annealing process. The highest cell efficiency reported to date for the laboratory scale has increased to 26.1%, fabricated by the Institute for Solar Energy Research. The cells used a p-type float zone silicon with an interdigitated back contact (IBC) structure that fabricates poly-Si and SiOx layer achieves the highest implied open-circuit voltage (iVoc) is 750 mV, and the highest level of edge passivation is 40%. This review presents an overview of p-type TOPCon technologies, including the ultra-thin silicon oxide layer (SiOx) and poly-silicon layer (poly-Si), as well as the advancement of the SiOx and poly-Si layers. Subsequently, the limitations of improving efficiency are discussed in detail. Consequently, it is expected to provide a basis for the simplification of industrial mass production.
Numerical simulation is a good way to predict the conversion efficiency of solar cells without a direct experimentation and to achieve low cost and high efficiency through optimizing each step of solar cell fabrication. TOPCon industrial solar cells fabricated with n-type silicon wafers on a larger area have achieved a higher efficiency than p-type TOPCon solar cells. Electrical and optical losses of the front surface are the main factors limiting the efficiency of the solar cell. In this work, an optimization of boron-doped emitter surface and front electrodes through numerical simulation using “Griddler” is reported. Through the analysis of the results of simulation, it was confirmed that the emitter sheet resistance of 150 Ω/sq along the front electrodes having a finger width of 20 μm, and the number of finger lines ~130 for silicon wafer of M6 size is an optimized technology for the front emitter surface of the n-type TOPCon solar cells that can be developed.
Field-effect transistors (FETs) are the key elements of conventional electronics; hence, have drawn a lot of research and commercial interests. In recent years, metal halide perovskite materials have achieved a remarkable efficiency of 29.15% in the field of photovoltaics, and have drawn the scientific community’s attention to promote their use in the field of optoelectronics, such as FETs and phototransistors. The MAPbI3 (methylammonium lead iodide) perovskite TFT has achieved a record hole mobility of 21.41 ㎠/V-s in the year 2020. In this review, we will briefly discuss the physical structure of MAPbI3 perovskite and the essential factors that stimulate these devices, together with the role of defects, the ion migration concept, and the implication of both dielectric and electrode materials on the device’s performance.
In order to achieve a high efficiency for the silicon solar cell, a passivation characteristic that minimizes the electrical loss at a silicon interface is required. In this paper, we evaluated the applicability of the oxide film formed by ozone for the tunnel silicon oxide film. To this end, we fabricated the silicon oxide film by changing the condition of ozone oxidation and compared the characteristics with the oxide film formed by the existing nitric acid solution. The ozone oxidation was formed in the temperature range of 300~500℃ at an ozone concentration of 17.5 wt%, and the passivation characteristics were compared. Compared to the silicon oxide film formed by nitric acid oxidation, implied open circuit voltage (iVoc) was improved by ~20 mV in the ozone oxidation and the ozone oxidation after the nitric acid pretreatment was improved by ~30 mV.
A nanofiber was fabricated with carbon nanotubes for transparent electrodes. It was prepared with a composite solution of bio-molecules polycaprolactone (PCL) and multiwalled carbon nanotubes (MWCNTs) by electrospinning on a glass substrate, following which its electrical characteristics were investigated. The content of MWCNTs was varied during electrospinning, while that of PCL was fixed. Further, a nanometer-thick thin film of silver was deposited on the nanofiber layer using a thermal evaporator to improve the electrical characteristics; the sheet resistance significantly reduced after this deposition. The results showed that this carbon nanotube nanofiber has potential applications in biotechnology and as a flexible transparent display material.
P3HT:PCBM bulk heterojunction solar cells added with ferroelectric polymer were fabricated and characterized. By incorporating P3HT:PCBM solar cell with P(VDF-TrFE) ferroelectric additive, the power conversion efficiency was increased up to nearly 50%. Photoacoustic analysis on this phenomena was carried out for the first time. Through this study, we find that the ferroelectricity of the polymer additive plays the key role in the enhancement of the power conversion efficiency of the organic solar cell by suppressing the non-radiative recombination of charge transfer exciton more effectively.
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Solvent-Dependent Crystallization and Charge Transport Evolution in Thermally Annealed P3HT:PCBM Bulk Heterojunction Solar Cells Dong-Kyun Kim, Byungyou Hong, Hyung Jin Kim Journal of Electrical and Electronic Materials.2026; 39(4): 400. CrossRef
In this paper, we designed and fabricated low cost imprinting process for micro patterning on FCCL (flexible copper clad laminate). Compared to conventional imprinting process, developed fabrication method processing imprint and UV photolithography step simultaneously and it does not require resin etch process and it can also reduce the fabrication cost and processing time. Based on proposed method, patterns with 10 ㎛ linewidth are fabricated on 180 ㎜ × 180 ㎜ FCCL. Compared to conventional methods using LDI (laser direct imaging) equipment that showed minimum line with 10 ∼ 20 ㎛, proposed method shows comparable pattern resolution with very competitive price and shorter processing time. In terms of mass production, it can be applied to fabrication of large-area low cost applications including FPCB.
One-dimensional photonic crystals (1D PCs) were fabricated by RF sputtering technique on p-Si (100), and fused quartz substrates. The 1D PCs structures consisted of TeOx (x=1.42), and SiO2 with the difference refractive index. In order to estimate the effect on a defect level within 1D PCs structures, samples were prepared with both normal, and defect mode. The structural and optical properties were confirmed by Scanning electron microscope (SEM), and Ultraviolet visible near-infrared spectrophotometer (UV-VIS-NIR) respectively. In the case of a 1D PC normal mode without defect layer, it had a photonic band gap (PBG) in the near infrared (NIR) region. In the case of a 1D PC defect mode with defect layer, it had a sharp transmission band owing to a defect level, and moved towards the longer wavelength after exposing He-Cd laser with a wavelength of 325 nm.
As a method of simple patterning of transparent conductive oxide (TCO) films deposited on flexible substrates, laser direct etching was carried out on TCO films sputtered on polycarbonate (PC) substrates. As a result of different binding energies in TCO films, indium tin oxide (ITO) and indium gallium zinc oxide (IGZO) were more easily etched than zinc oxide with different Nd: YVO4 laser beam conditions.
Dual-gate PCRAM which unify capacitor-less DRAM and NVM using a PCM instead of a typical SONOS flash memory is proposed as 1 transistor. VO2 changes its phase between insulator and metal states by temperature and field. The front-gate and back-gate control NVM and DRAM, respectively. The feasibility of URAM is investigated through simulation using c-interpreter and finite element analysis. Threshold voltage of NVM is 0.5 V that is based on measured results from previous fabricated 1TPCM with VO2. Current sensing margin of DRAM is 3 ㎂. PCM does not interfere with DRAM in the memory characteristics unlike SONOS NVM. This novel unified dual-gate PCRAM reported in this work has 1 transistor, a low RESET/SET voltage, a fast write/erase time and a small cell so that it could be suitable for future production of URAM.
We investigated the luminescence properties of Alq3 in the device structure of ITO/CuPc/TPD/Alq3/Al. The CuPc as a hole-injection material and TPD as hole-transport material. Emission properties were measured by varying a layer thickness of CuPc (0 nm to 50 nm), which is the hole-injection layer. As a result, it was found that the hole injection occurs smoothly when the layer thickness was 20 nm among the thicknesses from 0 nm to 50 nm.
Zinc oxide(ZnO) was sputtered on various glass and flexible substrates such as polyethylene terephthalate(PET) and polycarbonate(PC). A Q-switched Nd:YVO4 laser with a wavelength of 1,064 nm was used for the direct etching of ZnO films. It was possible to obtain laser etched line patterns on the ZnO films on PC substrate at some specific laser beam conditions. In the flexible substrates, more thermal energy of laser beam is expected to be spreaded for the etching process.
The Ti adhesion layers were deposited onto the glass substrate for transparent capacitors using Bi2Mg2/3Nb4/3O7 (BMNO) dielectric thin films. Graphene was transferred onto the Ti/glass substrate after growing onto the Ni/SiO2/Si using rapid-thermal pulse CVD (RTPCVD). The BMNO dielectric thin films were investigated for the microstructure, dielectric and leakage properties in the case of capacitors with and without Ti adhesion layers. Leakage current and dielectric properties were strongly dependent on the Ti adhesion layers grown for graphene bottom electrode.
Recently, energy harvesting technologies are considered as the great alternatives to reduce the dependency on secondary batteries. In this paper, we proposed PCB type energy harvester which can be directly integrated with other electronic components on same board. To form the three dimensional coil structure, two PCBs with patterned metal lines are solder bonded. For magnetic induction, inside of coil structure was filled with magnetic substance and rotary motioned external magnets are applied to near the harvester. The effects of metal wire width on PCB, thickness of magnetic substance, and frequency of rotary motion on energy harvesting performance are analyzed by computer simulation and experiments. Experimental results showed 29.89 ㎼ of power generation performance at the frequency of 5.2 Hz and it is shown that designed harvester can be effectively applied on vibration environment with very limited frequency.
The K-PCS and W-CDMA dual band dielectric duplexer and bandpass filters have been designed and fabricated. The dual band duplexer consists of the separate monoblock K-PCS and W-CDMA duplexers using common antenna port. The coupling capacitance and I/O impedance matching have been designed to minimize the cross interference between the bands. Isolations of crosspoint between Tx and Rx in K-PCS and W-CDMA dualband were about 47 dB and 100 dB, respectively. On the other hand, isolations of Tx and Rx in K-PCS and W-CDMA were about 66 dB and 65 dB, respectively. The difference between 47 dB and 100 dB originated from the different center frequencies in Tx and Rx of K-PCS and W-CDMA bands. The coupling capacitance of the bandwidth, I/O capacitance of I/O matching and impedance matching, and various capacitances were important role to fabricate the dielectric duplexer and bandpass filters.
For phase transition method, good record sensitivity, low heat radiation, fast crystallization and hi-resolution are essential. Also, a retention time is very important part for phase-transition. In our past papers, we chose composition of Ge1Se1Te2 material to use a Se factor which has good optical sensitivity than conventional Sb. Sb/Ge-Se-Te thin films are fabricated and irradiated with UV light source to investigate a reversible phase change by Sb-doped condition. Because of Sb atoms, the Sb inserted sample showed better performance than conventional one. We should note that this novel one showed another possibility for phase-change random access memory.
We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different device structure as a bottom and top contact FET. Also, we used a SiO2 as a gate insulator and analyzed using a current-voltage (I-V) characteristics of the bottom and top contact CuPc FET device. In order to discuss the channel formation, we were observed the capacitance-gate voltage(C-V) characteristics of the bottom and top contact CuPc FET device.
In this study, the heat transfer capability have been improved by using via-holes in FR4 PCB, when the LED lighting is designed to solve the thermal problem. The thermal resistance and junction temperature were measured by changing the dimension of FR4 PCB and size of via hole. As a result, when the dimension was increased initially, the thermal resistance and junction temperature was decreased rapidly, the ones was stabilized after the dimension of 200 [mm2]. Also, the light output was improved up to maximum 17% by formation of via-hole and expansion of dimension in FR4 PCB. Therefore, the thermal resistance and junction temperature could be improved by expansion of PCB dimension and configuration of via-hole ability.
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Reflection Characteristics of Electroplated Deposits on LED Lead frame with Plating Condition SeHo Kee, Wonjoong Kim, JaePil Jung Journal of the Microelectronics and Packaging Society.2013; 20(2): 29. CrossRef
Anisotropic Wet-Etching Process of Si Substrate for Formation of Thermal Vias in High-Power LED Packages B.K. Yu, M.Y. Kim, T.S. Oh Journal of the Microelectronics and Packaging Society.2012; 19(4): 51. CrossRef
Diamond thin films were deposited on pretreated Co cemented tungsten carbide (WC-6%Co) inserts as substrate by microwave plasma chemical vapor deposition (MPCVD) system, equipped with a 915MHz, 30kW generator for generating a large-size plasma. The substrates were pretreated with two solutions Murakami solution [KOH:K3Fe(CN)6:H2O] and nitric solution [HNO3:H2O] to etch, WC and Co at cemented carbide substrates, respectively. The deposition experiments were performed at an input power of 10 kW and in a total pressure of 100 torr. The influence of various CH4 contents on the crystallinity and morphology of the diamond films deposited in MPCVD was investigated using scanning electron microscopy (SEM) and Raman spectroscopy. The diamond film synthesized by the CH4 plasma shows a triangle-faceted (111) diamond. As CH4 contents was increased, the thickness of diamond films increased and the faceted planes disappeared. Finally, Faceted diamond changed into nano-crystalline diamond with random crystallinity.
In this investigation, the effects of N(2)/(Ar+N(2)) gas partial pressure on the structural, electrical, and thermal properties of AlN dielectric layers prepared on aluminum substrates using RF-magnetron sputtering method were analyzed. Among the films, the AlN dielectric film deposited under N(2)/(Ar+N(2)) gas partial pressure of 75% exhibit the highest AlN (002) preferred orientation, which was grain size of about 15.3(2) nm and very dense structure. We suggest the possibilities of it`s application as a dielectric layer for metal PCB because the AlN films prepared at optimized gas partial pressure can improving the insulating property, the thermal conductivity, and thermal diffusivity of the films.
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Characterization of AlN Thin Films Grown by Pulsed Laser Deposition on Sapphire Substrate Eun-Hee Jeong, Jun-Ki Chung, Rae-Young Jung, Sung-Jin Kim, Sang-Yeup Park Journal of the Korean Ceramic Society.2013; 50(6): 551. CrossRef
Abstract: In this paper, High brightness LED (light-emitting diodes) driver IC (integrated circuit) using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET (metal oxide semiconductor field effect transistor) from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. To confirm the functioning and characteristics of our proposed LED driver IC, we designed a buck converter. The LED current ripple of the designed IC is in ±5% and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses 1.0 ㎛X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre (Cadence) simulation.
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