There is an increasing demand for freeform stretchable display technologies capable of overcoming spatial limitations in next-generation platforms such as augmented reality (AR) and virtual reality (VR). To realize such stretchable displays, all constituent materials—including semiconductors, electrodes, insulators, and substrates—must exhibit sufficient mechanical elasticity. To date, stretchable gate insulators have primarily relied on organic polymers such as poly(4-vinylphenol-co-methyl methacrylate) (PVP-co-PMMA). However, their practical application is significantly limited by poor electrical properties, including low dielectric constant and instability. In this work, we propose a novel gate insulator structure that minimizes the use of solution-based processes, which often suffer from poor uniformity and may damage underlying layers during fabrication. The proposed structure integrates the advantages of both organic and inorganic materials by employing a hybrid configuration. Specifically, high-k HfO₂ thin films are deposited on both the top and bottom of an organic layer composed of PVP-co-PMMA, poly(melamine-co-formaldehyde) (PMF) as a crosslinking agent, and propylene glycol monomethyl ether acetate (PGMEA) as a solvent. This inorganic–organic–inorganic structure effectively compensates for the inherent electrical limitations of organic materials. As a result, the fabricated thin-film transistors (TFTs) exhibit improved electrical performance and reliability compared to devices employing a single organic gate insulator.

AlGaN/GaN High Electron Mobility Transistors (HEMTs) are emerging as next-generation semiconductors optimized for high-power and high-frequency applications, with their performance highly dependent on the surface and interface quality of the AlGaN/GaN structure. In particular, the 2-Dimensional Electron Gas (2DEG) formed in the AlGaN layer is susceptible to trapping by surface defects, which degrades electrical characteristics and makes the device vulnerable to degradation. In this study, we propose an approach to enhance device reliability and performance by forming a gallium oxynitride (GaON) interfacial layer through O₂ plasma treatment on the AlGaN surface. This method effectively suppresses interface defects, resulting in improved electrical properties such as reduced interface trap density (Dit), threshold voltage (Vth) shift, increased drain current density (Id), and enhanced transconductance density (gm). Furthermore, this surface treatment demonstrates the potential for process simplification by improving the electrical characteristics of power semiconductor devices without the need for complex deposition steps.

Recently, as the process of the MOS device becomes more detailed, and the degree of integration thereof increases, many problems such as leakage current due to an increase in electron tunneling due to the thickness of SiO₂ used as a gate oxide have occurred. In order to overcome the limitation of SiO₂, many studies have been conducted on HfO₂ that has a thermodynamic stability with silicon during processing, has a higher dielectric constant than SiO₂, and has an appropriate band gap. In this study, HfO₂, which is attracting attention in various fields, was doped with Al and the change in properties according to its concentration was studied. Al-doped HfO₂ thin film was deposited using Plasma Enhanced Atomic Layer Deposition (PEALD), and the structural and electrical characteristics of the fabricated MIM device were evaluated. The results of this study are expected to make an essential cornerstone in the future field of next-generation semiconductor device materials.

The ferroelectricity in Hf_0.5Zr_0.5O₂ (HZO) thin films is one of the most interesting topics for next-generation nonvolatile memory applications. It is known that a crystallization process is required at a temperature of 400℃ or higher to form an orthorhombic phase that results in the ferroelectric properties of the HZO film. However, to realize the integration of ferroelectric HZO films in the back-end-of-line, it is necessary to reduce the annealing temperature below 400℃. This study aims to comprehensively analyze the ferroelectric properties according to the annealing temperature (350-500℃) and time (1-5 h) using a furnace as a crystallization method for HZO films. As a result, the ferroelectric behaviors of the HZO films were achieved at a temperature of 400℃ or higher regardless of the annealing time. At the annealing temperature of 350℃, the ferroelectric properties appeared only when the annealing time was sufficiently increased (4 h or more). Based on these results, it was experimentally confirmed that the optimization of the annealing temperature and time is very important for the ferroelectric phase crystallization of HZO films and the improvement of their ferroelectric properties.

To enhance the tunneling electroresistance (TER) ratio of a ferroelectric tunnel junction (FTJ) device using Al-doped HfO₂ thin films, a thin insulating layer was prepared on a TiN bottom electrode, for which TiN was preliminarily treated at various temperatures in O₂ ambient. The composition and thickness of the inserted insulating layer were optimized at 600℃ and 50 Torr, and the FTJ showed a high TER ratio of 430. During the heat treatments, a titanium oxide layer formed on the surface of TiN, that suppressed oxygen vacancy generation in the ferroelectric thin film. It was found that the fabricated FTJ device exhibits two distinct resistance states with higher tunneling currents by properly heat-treating the TiN bottom electrode of the HfO₂-based FTJ devices in O₂ ambient.

The bipolar resistive switching characteristics of resistive random access memory (ReRAM) based on HfO2 thin films have been demonstrated by using Ag/HfO2/Pt structured ReRAM device. MIcrowave irradiation (MWI) treatment at low temperature was employed in device fabrication with HfO2thin films as a transition layer. Compared to the as-deposited Ag/HfO2/Pt device, highly improved uniformity characteristics of resistance values and operating voltages were obtained from the MWI treatment Ag/HfO2/Pt ReRAM device. In addition, a stable DC endurance (> 100 cycles) and a high data retention (> 104 sec) were achieved.

In order to prevent heat loss that occurs through the glass, low-emissivity (Low-E) coating methods with good insulating properties and high transmittance were used. lnGaZnO/Ag/InGaZnO (IGZO/Ag/IGZO) multilaver thin films have been deposited on XG glass substrate by HF magnetron sputtering. Depending on the different thickness of Ag in multilayer films, the structural and optical properties of Low-E multilayer films were analyzed. By XRI) analysis results, the multilayer thin films were observed to be amorphous structure regardless of Ag thickness. According to the AFM results, surface morphology of the multilayer films was observed and compared. Using UV-VIS spectroscopy, low emissivity propertty has been observed clearly with the transmittance of higher than 85% at visible range and lower than 30 at ll range.

In this paper, reliability of the two sandwiched MIM capacitors of Al2O3-HfO2-Al2O3 (AHA) and SiO2-HfO2-SiO2 (SHS) with hafnium-based dielectrics was analyzed using two kinds of voltage stress; DC and AC voltage stresses. Two MIM capacitors have high capacitance density (8.1 fF/μm2 and 5.2 fF/μm2) over the entire frequency range and low leakage current density of ∼1 nA/cm2 at room temperature and 1 V. The charge trapping in the dielectric shows that the relative variation of capacitance (ΔC/C0) increases and the variation of voltage linearity (α/α0) gradually decreases with stress-time under two types of voltage stress. It is also shown that DC voltage stress induced greater variation of capacitance density and voltage linearity than AC voltage stress.

In this study, we fabricate resistive switching random access memory (ReRAM) devices constructed with a Al/HfO2/ITO structure on glass substrates and investigate their memory characteristics. The hafnium oxide thin film used as a resistive switching layer is sputtered at room temperature in a sputtering system with a cooling unit. The Al/HfO2/ITO device exhibits bipolar resistive switching characteristics, and the ratio of the high resistance (HRS) to low resistance states (LRS) is more than 60. In addition, the resistance ratio maintains even after 10(4) seconds.

Hafnium oxide (HfO2) was very advantageous for substitute material of gate on existing transistor. HfO2 has been widely studied due to high contact with polysilicon and thermal stability and also, it is easily etched by using HF solution. In this study, HfO2 and thermal oxide films were etched by wet etch method using chemical etchant. Etch rate of HfO2 and thermal oxide was linearly increased with increasing concentration of HF and temperature but etch rate of HfO2 was higher than thermal oxide due to H+, F-, and HF2- ions at below 0.5% concentration of HF. And also, etch selectivity was improved by adding Hydrazine as additive.

We investigated the effects of low temperature (500℃) O2 annealing on the characteristics of hafnium silicate (HfSi(x)O(y)) films deposited on a Si substrate by atomic layer deposition (ALD). We found that the post deposition annealing under oxidizing ambient causes the oxidation of residual Hf metal components, resulting in the improvement of electrical characteristics such as flat band voltage shift (ΔV(fb)) by hysteresis without oxide capacitance reduction. We suggest that post deposition annealing under oxidizing ambient is necessary to improve the electrical characteristics of HfSi(x)O(y) films deposited by ALD.

In this paper, PBTI characteristics of NMOSFETs with La incorporated HfSiON and HfON are compared in detail. The charge trapping model shows that threshold voltage shift (ΔVT) of NMOSFETs with HfLaON is greater than that of HfLaSiON. PBTI lifetime of HfLaSiON is also greater than that of HfLaON by about 2∼3 orders of magnitude. Therefore, high charge trapping rate of HfLaON can be explained by higher trap density than HfLaSiON. The different de-trapping behavior under recovery stress can be explained by the stable energy for U-trap model, which is related to trap energy level at zero electric field in high-k dielectric. The trap energy level of two devices at zero electric field, which is extracted using Frenkel-poole emission model, is 1,658 eV for HfLaSiON and 1,730 eV for HfLaON, respectively. Moreover, the optical phonon energy of HfLaON extracted from the thermally activated gate current is greater than that of HfLaSiON.