With the advancement of the information society, the demand for highly integrated and multi-functional electronic devices is rapidly increasing. To meet these demands, high-performance transistors with low power consumption, high-speed operating, and mechanical flexibility are essential. Among various candidates, semiconducting single-walled carbon nanotubes (s-SWCNT)-based transistors, which exhibit intrinsically ambipolar characteristics, have emerged as promising components for CMOS-like circuits. In this study, s-SWCNT were selectively dispersed using rr-P3DDT, a thiophene-based conjugated polymer, and filed-effect transistors (FETs) were fabricated by inducting directional alignment for enhanced charge transport through an off-centered spin-coating process. The electrical characteristics of the fabricated s-SWCNT FETs were evaluated under various thermal annealing conditions (100℃, 150℃, 200℃, and 250℃). Off-centered spin-coated and high temperature annealed s- SWCNT FETs exhibited high field-effect mobilities over 5 cm²/Vs in both p-type and n-type operation, along with ideal Vshaped ambipolar transfer curves. These results indicate a significant enhancement in ambipolar performance due to efficient desorption of residual oxygen and water molecules in active channel via high temperature annealing. Furthermore, CMOS-like inverter circuits demonstrated an ideal inversion voltage (VIN = V_DD/2) and a high voltage gain of approximately 9.5. These findings highlight the potential of SWCNT-based materials for realizing next-generation flexible electronic circuits that combine high-performance, energy efficiency, and simplified solution-processing.

Herein, we report the manufacture of high-performance, ambipolar organic field-effect transistors (OFETs) and complementary-like electronic circuitry based on a blended, polymeric, semiconducting film. Relatively high and wellbalanced electron and hole mobilities were achieved by incorporating a small amount of ionic additives. The equivalent P-channel and N-channel properties of the ambipolar OFETs enabled the manufacture of complementary-like inverter circuits with a near-ideal switching point, high gain, and good noise margins, via a simple blanket spin-coating process with no additional patterning of each active P-type and N-type semiconductor layer.

The changes in the electrical characteristics of CMOS ICs due to coupling with a narrow-band electromagnetic wave were analyzed in this study. A magnetron (3 kW, 2.45 GHz) was used as the narrow-band electromagnetic source. The DUT was a CMOS logic IC and the gate output was in the ON state. The malfunction of the ICs was confirmed by monitoring the variation of the gate output voltage. It was observed that malfunction (self-reset) and destruction of the ICs occurred as the electric field increased. To confirm the variation of electrical characteristics of the ICs due to the narrow-band electromagnetic wave, the pin-to-pin resistances (Vcc-GND, Vcc-Input1, Input1-GND) and input capacitance of the ICs were measured. The pin-to-pin resistances and input capacitance of the ICs before exposure to the narrow-band electromagnetic waves were 8.57 MΩ (Vcc-GND), 14.14 MΩ (Vcc-Input1), 18.24 MΩ (Input1-GND), and 5 pF (input capacitance). The ICs exposed to narrow-band electromagnetic waves showed mostly similar values, but some error values were observed, such as 2.5 Ω, 50 MΩ, or 71 pF. This is attributed to the breakdown of the pn junction when latch-up in CMOS occurred. In order to confirm surface damage of the ICs, the epoxy molding compound was removed and then studied with an optical microscope. In general, there was severe deterioration in the PCB trace. It is considered that the current density of the trace increased due to the electromagnetic wave, resulting in the deterioration of the trace. The results of this study can be applied as basic data for the analysis of the effect of narrow-band high-power electromagnetic waves on ICs.

In this paper, we designed a charge pump circuit using level shifter for LED driver IC. The designed circuit makes the 15 V output voltage from the 5 V input in condition of 50 kHz switching frequency. The prototype chip which include the proposed charge pump circuit and its several internal sub-blocks such as oscillator, level shifter was fabricated using a 0.35 um 20 V BCD process technology. The size of the fabricated prototype chip is 2,350 um × 2,350 um. We examined performances of the fabricated chip and compared its measured results with SPICE simulation data.

FPN (fixed-pattern-noise) mainly comes from the device or pattern mismatches in pixel and color filter, pixel photodiode leakage in CMOS image sensor. In this paper, optical stack module related pixel FPN was investigated and the classification of pixel FPN contribution with the individual optical module process was presented. The methodology and procedure would be helpful in reducing the greater pixel FPN and distinguishing the complex FPN sources with respect to various noise factors.