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실리콘 액정표시 장치 시스템을 위한 0.5μm 이중 게이트 고전압 CMOS 공정 연구

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A Study on the 0.5μm Dual Gate High Voltage CMOS Process for Si Liquid Display System

Han Jung Song
J Electr Electron Mater 2002;15(12):1021-1026.
Published online: December 1, 2002
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A Study on the 0.5μm Dual Gate High Voltage CMOS Process for Si Liquid Display System
J Electr Electron Mater. 2002;15(12):1021-1026.   Published online December 1, 2002
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

Format:
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A Study on the 0.5μm Dual Gate High Voltage CMOS Process for Si Liquid Display System
J Electr Electron Mater. 2002;15(12):1021-1026.   Published online December 1, 2002
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