In this study, we investigated the electrical stability and performance enhancement of In₂O₃ thin-film transistors (TFTs) through hydrogen peroxide (H₂O₂) and ultraviolet (UV) treatment under controlled temperature conditions. The In₂O₃ TFTs were fabricated using a sol-gel process, followed by H₂O₂ treatment at 40, 50, and 60℃ in combination with UV irradiation. The impact of these processing conditions on the device characteristics, including mobility (μ), threshold voltage (Vth), subthreshold swing (S/S), and on/off current ratio, was systematically analyzed. The results indicate that the 50℃ TFTs exhibited the most stable electrical performance, with minimal Vth shift under negative bias stress (NBS) conditions and optimized switching behavior. Furthermore, static inverter measurements confirmed the reliable voltage transfer characteristics (VTCs) and gain performance of the optimized In₂O₃ TFTs. These findings suggest that the proposed H₂O₂ and UV treatment technique can effectively improve the reliability and long-term stability of In₂O₃-based electronic devices, making them promising candidates for future electronic applications.

Recently, oxide semiconductors have assumed a pivotal role in electronic displays and transparent electronic devices such as amorphous indium gallium zinc oxide (a-IGZO), characterized by high electron mobility and excellent stability. a- IGZO is very suitable for next-generation applications such as flexible displays because it is possible to manufacture highperformance transistors even at low temperatures. However, since the electrical properties tend to deteriorate in hightemperature environments, research aimed at improving thermal stability is needed. In this study, a low-temperature plasma annealing process was introduced to improve the high-temperature stability of the a-IGZO thin film. This process enhances electron mobility by reducing defects in the a-IGZO film and provides stable device performance even under high-temperature conditions. As a result of the experiments of 5 min, 10 min, 15 min, and 20 min, the a-IGZO TFT, which was subjected to plasma annealing at 160℃ for 5 min, showed the best electrical performance, especially in charge mobility and current-voltage characteristics. The technical potential for improving the performance of a-IGZO-based display device was emphasized, and the foundation for applying this power generation to flexible displays and next-generation electronic devices was laid. Future research will focus on determining the optimal annealing conditions by exploring various temperature ranges and plasma parameters to integrate these results into the actual device manufacturing process. These efforts are expected advance significantly to advancing next-generation high-performance display technology.

In this study, the electrical properties of zinc oxide (ZnO) thin-film transistors (TFTs) based on oxide semiconductors were analyzed. As interest in next-generation transparent and flexible displays grows, ZnO, which offers high field-effect mobility and transparency, has emerged as a promising material to overcome the limitations of amorphous silicon (a-Si)-based TFTs. ZnO has a wide bandgap and optical transparency and can be deposited on various substrates at low temperatures, making it a suitable channel material for future display devices. In this study, ZnO TFTs were fabricated with an inverted staggered structure using a p⁺⁺ Si wafer coated with SiO₂ as the substrate. The ZnO channel layer was deposited by RF magnetron sputtering, and the ITO source/drain electrodes were formed using an e-beam evaporator. The electrical characteristics was evaluated using Keithley 4200A-SCS parameter analyzer. Mobility, On/Off ratio, and subthreshold swing (SS) were calculated from the measurements.

The display industry has recently been at the forefront of innovative advancements in modern electronic devices. Technological progress such as flexible display holds significant potential across various application fields, particularly in wearable devices and rollable displays. A low-temperature process is essential for fabricating such displays. One of the key technologies in displays is the thin film transistor (TFT), with amorphous indium gallium zinc oxide (a-IGZO) receiving particular attention. a-IGZO is widely applied in high-performance displays due to its high charge mobility and stability. While a thermal treatment above 350℃ is typically required to maximize the electrical performance of a-IGZO TFTs, such high temperatures pose challenges for utilizing polymer substrates like plastics. Here, we thesis investigates the simultaneous lowtemperature plasma annealing process to develop next-generation high-performance flexible display devices. To define the optimal temperature, devices were fabricated and analyzed at varying temperatures of 40℃, 80℃, 120℃, and 160℃. Experimental results indicated that devices fabricated at 160℃ and 80℃ exhibited superior performance, with those at 160℃ demonstrating better performance in terms of current ratio, threshold voltage, and subthreshold swing. These findings confirm that the simultaneous low-temperature plasma annealing process is effective for next-generation high-performance displays.

In recent years, the transparent amorphous oxide thin film transistor represented by indium-gallium-zinc-oxide (IGZO) has become the first choice of the next generation of integrated circuit control components. This article contributes an overview of IGZO thin-film transistors (TFTs), including their fundamental principles and recent advancements. The paper outlines various TFT structures and places emphasis on the fabrication process of the active layer. The result showed that the size of the active layer including the length-to-width ratio and the width could have a significant effect on the mobility. And the process of TFT could influence the crystal structure of IGZO thin film. Furthermore, the article presents an overview of recent applications of IGZO TFTs, such as their use in display drivers and TFT memories. At last, the future development of IGZO TFT is forecasted in this paper.

TFTs technologies with as high mobility as possible is essential for high-performance large displays. TFTs using nanocrystalline silicon thin films can achieve higher mobility. In this work, the change of the crystalline volume fraction at different hydrogen dilution ratios was investigated by depositing nc-Si:H thin films using PECVD. It was observed that increasing hydrogen dilution ratio increased not only the crystalline volume fraction but also the crystallite size. The thin films with a high crystalline volume fraction (55%) and a low defect density (10¹⁷ cm^-3·eV^-1) were used as top gate TFTs channel layer, leading to a high mobility (55 ㎠/V·s). We suggest that TFTs of high mobility to meet the need of display industries can be benefited by the formation of thin film with high crystalline volume fraction as well as low defect density as a channel layer.

The transfer characteristics of amorphous indium gallium zinc oxide thin film transistor (a-IGZO TFT) showed the distortion in the subthreshold region after gate bias stress, in addition to the parallel shift of threshold voltage. The capacitancevoltage (C-V) curve was also deformed from its initial shape after the gate bias stress. This study analyzes both the C-V and transfer curves plotted on the same gate voltage axis in order to investigate the mechanism driving the distortion in the transfer curve. It is deduced that an additional interfacial trap states at the bottom interface of a-IGZO are produced during gate bias stress, thereby they exhibit the back channel effect, which explains the origin of the distortion in the transfer curve and the deformation of C-V curve.

We investigated the electrical characteristics of amorphous silicon-zinc-tin-oxide (a-SZTO) thin films deposited by RF-magnetron sputtering at room temperature depending on the deposition time. We fabricated a thin film transistor (TFT) with a bottom gate structure and various channel thicknesses. With increasing channel thickness, the threshold voltage shifted negatively from -0.44 V to -2.18 V, the on current (I_on) and field effect mobility (μFE) increased because of increasing carrier concentration. The a-SZTO film was fabricated and analyzed in terms of the contact resistance and channel resistance. In this study, the transmission line method (TLM) was adopted and investigated. With increasing channel thickness, the contact resistance and sheet resistance both decreased.

This research introduces the sputtered IZO thin film transistor (TFT) with solution-processed Al₂O₃ diffusion layer. IZO is one of the most commonly used amorphous oxide semiconductor (AOS) TFT. However, most AOS TFTs have many defects that degrade performance. Especially oxygen vacancy in the active layer. In previous research, aluminum was used as a carrier suppressor by binding the oxygen vacancy and making a strong bond with oxygen atoms. In this paper, we use a solution-processed Al₂O₃ diffusion layer to fabricate stable IZO TFTs. A double-layer solution-processed Al2O3-sputtered IZO TFT showed better performance and stability, compared to normal sputtered IZO TFT.

The effect of NH₃ plasma treatment on device characteristics was confirmed for an optimized thin film transistor of poly-Si formed by ELA. When C-V curve was checked for MIS (metal-insulator-silicon), Dit of NH₃ plasma treated and MIS was 2.7×10¹⁰ cm^-2eV^-1. Also in the TFT device case, it was decreased to the sub-threshold slope of 0.5 V/decade, 1.9 V of threshold voltage and improved in 26 cm²V^-1S^-1 of mobility. Si-N and Si-H bonding reduced dangling bonding to each interface. When gate bias stress was applied, the threshold voltage`s shift value of NH₃ plasma treated device was 0.58 V for 1,000s, 1.14 V for 3,600s, 1.12 V for 7,200s. As we observe from this quality, electrical stability was also improved and NH3 plasma treatment was considered effective for passivation.

We report on amorphous thin-film transistors (TFTs) with indium zinc oxide (IZO) channel layers that were fabricated via a solution process. We prepared the IZO semiconductor solution with 0.1 M indium nitrate hydrate and 0.1 M zinc acetate dehydrate as precursor solutions. The solution- processed IZO TFTs showed good performance: a field-effect mobility of 7.29 ㎠/Vs, a threshold voltage of 4.66 V, a subthreshold slope of 0.48 V/dec, and a current on-to-off ratio of 1.62×10⁵. To investigate the static response of our solution-processed IZO TFTs, simple resistor load-type inverters were fabricated by connecting a 2-MΩ resistor. Our IZOTFTbased N-MOS inverter performed well at operating voltage, and therefore, isa good candidate for advanced logic circuits and display backplane.

Zinc tin oxide transparent thin film transistors (ZTO TTFTs) were fabricated by using n`` Si wafers as gate electrodes. Indium (In), aluminum (Al), indium tin oxide (ITO), silver (Ag), and gold (Au) were employed for source and drain electrodes, and the mobility and the threshold voltage of ZTO TTFTs were observed as a function of electrode. The ZTO TTFTs adopting In as electrodes showed the highest mobility and the lowest threshold voltage. It was shown that Ag and Au are not suitable for the electrodes of ZTO TTFTs. As the results of this study, it is considered that the interface properties of electrode/ZTO are more influential in the properties of ZTO TTFTs than the conductivity of electrode.

Zinc tin oxide transparent thin film transistors (ZTO TTFTs) were fabricated on oxidized n+ Si wafers. The thickness of 30 nm Al2O3 films were deposited on the oxidized Si wafers by atomic layer deposition, which acted as the gate insulators of ZTO TTFTs. The Al2O3 films were rapid-annealed at 400 , 600 , 800 , and 1,000 , respectively. Active layers of ZTO films were deposited on the Al2O3/SiO2 coated n+ Si wafers by rf magnetron sputtering. Mobility and threshold voltage were measured as a function of the rapid-annealing temperature. X-ray photoelectron spectroscopy (XPS) were carried out to observe the chemical bindings of Al2O3 films. The annealing effects of gate-insulator on the properties of TTFTs were analyzed based on the results of XPS.

Transparent thin film transistors were fabricated on n+-Si wafers coated by Al2O3/SiO2. Zinctin oxide (ZTO) films deposited by rf magnetron sputtering were employed for active layers. The mobility(μs), threshold voltage (VT), and sub threshold swing (SS) dependances on ZTO thickness were analyzed. The VT decreased with increasing ZTO thickness. The μs raised from 5.1 cm2/Vsec to 27.0 cm2/Vsec byincreasing ZTO thickness from 7 nm to 12 nm, and then decreased with ZTO thickness above 12 nm. The SS was proportional to ZTO thickness.

Bottom-gate tin oxide (SnO2) thin film transistors (TFTs) were fabricated on N+ Si wafersused as gate electrodes. 60-nm-thick SnO2 thin films acting as active layers were sputtered onSiO2/Al2O3 films. The SiO2/Al2O3 films deposited on the Si wafers were employed for gate dielectrics. Inorder to increase the resistivity of the SnO2 thin films, oxygen mixed with argon was introduced into thechamber during the sputtering. The mobility of SnO2 TFTs was measured as a function of the flow ratioof oxygen to argon (O2/Ar). The mobility variation with O2/Ar was analyzed through studies oncrystallinity, oxygen binding state, optical properties. X-ray diffraction (XRD) and XPS (X-rayphotoelectron spectroscopy) were carried out to observe the crystallinity and oxygen binding state ofSnO2 films. The mobility decreased with increasing O2/Ar. It was found that the decrease of the mobilityis mainly due to the decrease in the polarizability of SnO2 films.

Thin-film transistors(TFTs) with silicon-zinc-tin-oxide(SiZnSnO, SZTO) channel layer are fabricated by rf sputtering method. Electrical properties were changed by different annealing treatment of dry annealing and wet annealing. This procedure improves electrical property especially, stability of oxide TFT. Improved electrical properties are ascribed to desorption of the negatively charged oxygen species from the surfaces by annealing treatment. The threshold voltage (Vth) shifted toward positive as increasing Si contents in SZTO system. Because the Si has a lower standard electrode potential (SEP) than that that of Sn, Zn, resulting in the degeneration of the oxygen vacancy (Vo). As a result, the Si acts as carrier suppressor and oxygen binder in the SZTO as well as a Vib controller, resulting in the enhancement of stability of TFTs,

Mg doped zinc tin oxide (ZTOMg) thin films were prepared on glasses by rf magnetron sputtering. O was introduced into the chamber during the sputtering. The optical properties of the films as a function of oxygen flow rate were studied. The crystal structure, elementary properties, and depth profiles of the films were investigated by X-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS), and secondary ion mass spectrometry (SIMS), respectively. Bottom-gate trdnsparent thin film transistors were fabricated on N Si wafers, and the variation of mobility, threshold voltage etc. with the oxygen flow rate were observed.

Transparent thin film transistors (TTFT) were fabricated on N+ Si wafers. SiO2, Si3N4/SiO2 and Al2O3/SiO2 grown on the wafers were used as gate insulators. The rf magnetron sputtered zinc tin oxide (ZTO) films were adopted as active layers. N+Si wafers were wet-oxidized to grow SiO2. Si3N4 and Al2O3 films were deposited on the SiO2 by plasma enhanced chemical vapor deposition (PECVD) and atomic layer deposition (ALD), respectively. The mobility, Ion/Ioff and subthreshold swing (SS) were obtained from the transfer characteristics of TTFTs. The properties of gate insulators were analyzed by comparing the characteristics of TTFTs. The property variation of the ZTO TTFTs with time were observed.

We herein present results of flat and uniform polymer-blended small molecular semiconductor thin films. Which were produced for organic thin film transistors (OTFTs), using a simple pre-metered horizontal dipping process. The organic semiconducting thin films were composed of 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-PEN) composite blended with a polymer binder of poly(α-methylstyrene) (PaMS). We show that the pre-metered horizontal-dip-coating(H-dip-coating) process allowed the critical control of the thickness of the blended TIPS-PEN:PaMs thin film. The fabricated OTFTs using the TIPS-PEN:PaMs films exhibited maximum field-effect mobility of 0.22 cm2 V-1 s-1. These results demonstrated that H-dip-coated TIPS-PEN:PaMS films show considerable promise for the production of reliable, reproducible, and high-performance OTFTs.

Transparent thin film transistors (TTFT) were fabricated using the rf magnetron sputtered ZnO-SnO2 films as active layers. A ceramic target whose Zn atomic ratio to Sn is 2:1 was employed for the deposition of ZnO-SnO2 films. To study the post-annealing effects on the properties of TTFT, ZnO-SnO2 films were annealed at 200℃ or 400℃ for 5 min before In deposition for source and drain electrodes. Oxygen was added into chamber during sputtering to raise the resistivity of ZnO-SnO2 films. The effects of oxygen addition on the properties of TTFT were also investigated. 100 nm Si3N4 film grown on 100 nm SiO2 film was used as gate dielectrics. The mobility, Ion/Ioff, interface state density etc. were obtained from the transfer characteristics of ZnO-SnO2 TTFTs.

In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT`s. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT`s due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

Poly Si TFTs (poly silicon thin film transistors) with p channel those are annealed HT (high t emperature) with gate poly crystalline silicon and LT (low temperature) with metal gate electrode were fabricated on quartz substrate using the analyzed data and compared according to the activated grade silicon thin films and the size of device channel. The electrical characteristics of HT poly-Si TFTs increased those are the on current, electron mobility and decrease threshold voltage by the quality of particles of active thin films annealed at high temperature. But the on/off current ratio reduced by increase of the off current depend on the hot carrier applied to high gate voltage. Even though the size of the particles annealed at low temperature are bigger than HT poly-Si TFTs due to defect in the activated grade poly crystal silicon and the grain boundary, the characteristics of LT poly-Si TFTs were investigated deterioration phenomena those are decrease the electric off current, electron mobility and increase threshold voltage. The results of transconductance show that slope depend on the quality of particles and the amplitude depend on the size of the active silicon particles.

To integrate the sensor driver and logic circuits, fabricating down scaled transistors has been main issue. At this research, short channel effects were analyzed after n channel polycrystalline silicon thin film transistor was fabricated at high temperature. As a result, on current, on/off current ratio and transconductance were increased but threshold voltage, electron mobility and s-slope were reduced with a decrease of channel length. When carriers that develop at grain boundary in activated polycrystalline silicon have no gate biased, on current was increased with punch through by drain current. Also, due to BJT effect (parallel bipolar effect) that developed under region of channel by increase of gate voltage on current was rapidly increased.

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by 7.1×101. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

To stabilize the electric characteristic of Silicon Thin Film Transistor, reducing the current leakage is most important issue. To reduce the current leakage, many ideas were suggested. But the increse of mask layer also increased the cost. On this research Bird`s Beak process was use to present element. Using Silvaco simulator, it was proven that it was able to reduce current leakage without mask layer. As a result, it was possible to suggest the structure that can reduce the current leakage to 1.39nA without having mask layer increase. Also, I was able to lead the result that electric characteristic (on/off current ratio) was improved compare from conventional structure.