Organic solar cells based on bulk heterojunction (BHJ) structures have attracted considerable attention because of their low fabrication cost, mechanical flexibility, and compatibility with solution-processing techniques. In BHJ organic photovoltaic devices, nanoscale morphology and crystallinity of the photoactive layer critically influence photovoltaic performance. In this study, the effects of solvent selection and thermal annealing on crystallization evolution and photovoltaic characteristics of P3HT:PCBM organic solar cells were systematically investigated. Three different solvents, including toluene, chlorobenzene (CB), and dichlorobenzene (DCB), were employed for active-layer fabrication, followed by post-thermal annealing treatment. UV–visible absorption spectroscopy revealed solvent-dependent differences in molecular ordering and intermolecular π–π interactions within the active layer. X-ray diffraction analysis confirmed that thermal annealing significantly enhanced crystallinity and lamellar ordering of P3HT domains, particularly for CB-processed films. Electrical characterization demonstrated that solvent evaporation behavior strongly affects photovoltaic performance. Among the investigated devices, the thermally annealed CB-processed device exhibited the highest power conversion efficiency of 1.83% with an enhanced short-circuit current density of 7.057 mA cm⁻². The improved device performance is attributed to optimized crystallization behavior and balanced nanoscale phase separation induced by the moderate evaporation characteristics of CB. In contrast, although DCB-assisted films exhibited relatively strong optical absorption and enhanced crystallinity, excessively slow solvent evaporation likely induced excessive aggregation and coarse phase separation, limiting efficient photovoltaic characteristics. These results demonstrate that solvent engineering combined with thermal annealing is an effective strategy for controlling morphology evolution and crystallization behavior in P3HT:PCBM bulk heterojunction solar cells.

GaN nanowire (NW)-based hybrid structures have attracted attention for optoelectronic applications due to their high surface area and efficient carrier transport. However, the optical transparency of GaN NWs is often limited by unintended residual species accumulated on the surface and in the inter-wire regions, as well as defect-related absorption, leading to reduced light transmission. In this work, we demonstrate that thermal annealing significantly improves the optical transparency of GaN NWs grown on indium tin oxide (ITO)/glass substrates. The transmittance increased from 47.9% to 78.5% at 550 nm after rapid thermal annealing at 800^oC for 3 min, while a comparable value (~75.5%) was achieved at 600^oC for 5 min. PbBr₃ was deposited onto the GaN NWs to form hybrid structures, and temperature-dependent photoluminescence (TDPL) measurements revealed enhanced emission stability with suppressed peak shift and reduced spectral broadening. Arrhenius analysis based on a two-channel model revealed that the activation energy of the dominant non-radiative recombination pathway increased from 62 meV in the as-grown sample to 85 meV after thermal annealing, while its relative contribution remained nearly unchanged. In contrast, the shallow trap-assisted pathway exhibited a similar activation energy of approximately 6 meV in both samples, but its contribution decreased from 0.35 to 0.17 after annealing. As a result, the internal quantum efficiency (IQE) improved from 75.9% to 87.4%. These results show that thermal annealing improves optical transparency by removing residuals and suppresses defect-related recombination, leading to enhanced carrier dynamics and improved optical performance of PbBr₃-based hybrid structures.

With the advancement of the information society, the demand for highly integrated and multi-functional electronic devices is rapidly increasing. To meet these demands, high-performance transistors with low power consumption, high-speed operating, and mechanical flexibility are essential. Among various candidates, semiconducting single-walled carbon nanotubes (s-SWCNT)-based transistors, which exhibit intrinsically ambipolar characteristics, have emerged as promising components for CMOS-like circuits. In this study, s-SWCNT were selectively dispersed using rr-P3DDT, a thiophene-based conjugated polymer, and filed-effect transistors (FETs) were fabricated by inducting directional alignment for enhanced charge transport through an off-centered spin-coating process. The electrical characteristics of the fabricated s-SWCNT FETs were evaluated under various thermal annealing conditions (100℃, 150℃, 200℃, and 250℃). Off-centered spin-coated and high temperature annealed s- SWCNT FETs exhibited high field-effect mobilities over 5 cm²/Vs in both p-type and n-type operation, along with ideal Vshaped ambipolar transfer curves. These results indicate a significant enhancement in ambipolar performance due to efficient desorption of residual oxygen and water molecules in active channel via high temperature annealing. Furthermore, CMOS-like inverter circuits demonstrated an ideal inversion voltage (VIN = V_DD/2) and a high voltage gain of approximately 9.5. These findings highlight the potential of SWCNT-based materials for realizing next-generation flexible electronic circuits that combine high-performance, energy efficiency, and simplified solution-processing.

This study investigates the post-thermal treatment effects on the efficiency of silicon heterojunction solar cells, specifically examining the influence of annealing on p-type microcrystalline silicon oxide and ITO thin films. By assessing changes in carrier concentration, mobility, resistivity, transmittance, and optical bandgap, we identified conditions that optimize these properties. Results reveal that appropriate annealing significantly enhances the fill factor and current density, leading to a notable improvement in overall solar cell efficiency. This research advances our understanding of thermal processing in siliconbased photovoltaics and provides valuable insights into the optimization of production techniques to maximize the performance of solar cells.

The Ga₂O₃ thin films were deposited using an RF sputtering system and the effect of crystallographic and optical properties under rapid thermal annealing conditions on Ga₂O₃ thin film was evaluated. A rapid thermal annealing method can fabricate a crystalline Ga₂O₃ thin film which is applied to various fields with a low cost and a high efficiency compared with the conventional post-annealing method. In this study, the Ga₂O₃ treated at 900℃ for 1 min showed the beta and gamma phases in XRD measurement. In optical properties, the crystalline Ga₂O₃ represented a high transmittance of more than 80% in the visible region and was calculated with a high optical bandgap energy of 4.58 eV. The beta and gamma phases Ga₂O₃ can be obtained by adjusting the rapid thermal annealing temperatures, and the various properties such as the optical bandgap energy can be controlled. Moreover, it is expected that crystalline Ga₂O₃ can be applied to various devices by controlling not only temperature but process time.

This paper demonstrates a novel NAND flash memory structure and annealing configuration including through-silicon via (TSV) inside the silicon substrate to improve annealing efficiency using an electro-thermal annealing (ETA) technique. Compared with the conventional ETA which utilizes WL-to-WL current flow, the proposed annealing method has a higher annealing temperature as well as more uniform heat distribution, because of thermal isolation on the silicon substrate. In addition, it was found that the annealing temperature is related to the electrical and thermal conductivity of the TSV materials. As a result, it is possible to improve the reliability of NAND flash memory. All the results are discussed based on 3-dimensional (3-D) simulations with the aid of the COMSOL simulator.

Localized heat can be generated using electrically conductive word-lines built into a 3D NAND flash memory string. The heat anneals the gate dielectric layer and improves the endurance and retention characteristics of memory cells. However, even though the electro-thermal annealing can improve the memory operation, studies to investigate material failures resulting from electro-thermal stress have not been reported yet. In this context, this paper investigated how applying electro-thermal annealing of 3D NAND affected mechanical stability. Hot-spots, which are expected to be mechanically damaged during the electro-thermal annealing, can be determined based on understanding material characteristics such as thermal expansion, thermal conductivity, and electrical conductivity. Finally, several guidelines for improving mechanical stability are provided in terms of bias configuration as well as alternative materials.

Reliability of CMOS has been severed under aggressive device scaling. Conventional technologies such as lightly doped drain (LDD) and forming gas annealing (FGA) have been applied for better device reliability, but further advances are modest. Alternatively, electro-thermal annealing (ETA) which utilizes Joule heat produced by electrodes in a MOSFET, has been newly introduced for gate dielectric curing. However, concerns about mechanical stability during the electro-thermal annealing, have not been discussed, yet. In this context, this paper demonstrates the mechanical stability of nanosheet FET during the electro-thermal annealing. The effect of mechanical stresses during the electro-thermal annealing was investigated with respect to device design parameters.

In this work, we have investigated the effect of a 30-min thermal anneal at 550℃ on the electrical characteristics of neutron-irradiated 4H-SiC MOSFETs. Thermal annealing can recover the on/off characteristics of neutron-irradiated 4H-SiC MOSFETs. After thermal annealing, the interface-trap density decreased and the effective mobility increased in terms of the on-characteristics. This finding could be due to the improvement of the interfacial state from thermal annealing and the reduction in Coulomb scattering due to the reduction in interface traps. Additionally, in terms of the off-characteristics, the thermal annealing resulted in the recovery of the breakdown voltage and leakage current. After the thermal annealing, the number of positive trapped charges at the MOSFET interface was decreased.

We prepared SnS_x thin films on both soda-lime glass (SLG) and molybdenum(Mo)/SLG substrates by a two-step process using a Sn precursor followed by sulfur reaction in rapid thermal annealing (RTA) at different sulfurization temperatures (Ts = 200℃, 230℃, 250℃, and 300℃) and annealing times (t_s = 10 min and 30 min). The single SnS phase was dominant for 200℃≤T_s<250℃, while an additional phase of SnS₂ was appeared at T_s≥250℃ alongside SnS. The SnS grains in all the samples showed strong growth along the preferred [040] direction. The band-gap energy (E_g) of the films was estimated to be 1.24 eV.

In this paper, TiO2 based thin-film transistors (TFTs) were fabricated using by an atomic layer deposition with high aspect ratio and excellent step coverage. Ti02 semiconducting layer was deposited showing a rutile phase through the rapid thermal annealing process, and exhibited TFT characteristics with a 200 pm channel length of low-leakage currents (none of current flow during off-state), stable threshold voltages (-10 V - 0 V), and a much higher on/off current ratio (