Silicon carbide (SiC) MOSFETs provide superior performance compared to traditional silicon devices under hightemperature and high-power conditions, making them particularly valuable for power electronics applications requiring highfrequency switching and high-energy efficiency. As the electric vehicle (EV) market expands, these devices are commonly packaged into six-pack modules, which can show their different electrical characteristics between the bare-die device and the package due to packaging that improves heat dissipation and other properties. This study uses bare-die SiC MOSFETs to explore their intrinsic characteristics and evaluate their performance in a half-bridge configuration. A half-bridge circuit was constructed, and performance was assessed by varying driving frequencies (10 kHz and 50 kHz) and adjusting the duty cycle between 20% and 80%. Analysis revealed that, at a fixed switching frequency, the average output voltage and average output current are proportional to the duty cycle.

Silicon carbon nitride (SiCN) thin films are promising materials for copper diffusion barriers and hybrid bonding in semiconductor processes. Oxidation-resistant films are increasingly critical for realizing high-reliability devices, highlighting the need for process control and property evaluation. In this study, we analyzed the thin film properties as a function of tetramethylsilane (4MS) gas partial pressure ratio (PPR), deposition temperature, and dual-power plasma conditions in a PECVD-based SiCN deposition process. Based on the results, we experimentally demonstrated that the refractive index can be a valid indicator for oxidation resistance evaluation. The application of dual-power plasma conditions was instrumental in enhancing oxidation resistance. Under these conditions, the refractive index reached approximately 1.90 even at 200℃, comparable to values observed in films deposited at 350℃. These findings provide a basis for predicting oxidation resistance and optimizing low-temperature conditions, with applications in next-generation semiconductor and packaging technologies requiring high reliability.

Ga₂O₃ is an ultra-wide bandgap semiconductor material that offers superior electrical properties for high-voltage power electronics but suffers from poor thermal conductivity compared to conventional semiconductors. To overcome this thermal limitation, we developed Ga₂O₃/4H-SiC heterojunction Schottky barrier diodes that utilize the high thermal conductivity of SiC substrates. Using the aerosol deposition method, we successfully fabricated devices with different Ga₂O₃ film thicknesses (0.8-1.4 μm) and achieved exceptional electrical performance with the 0.8 μm device showing a specific on-resistance of 41 mΩ·cm² and a leakage current as low as 1.26 × 10^-10 A/cm² while maintaining stable operation up to 200℃. The devices demonstrated breakdown voltages reaching 2,365 V and maintained excellent rectification ratios above 1010 even at elevated temperatures. All fabricated devices with different film thicknesses showed consistent high-temperature stability, confirming the effectiveness of the heterojunction approach. These results provide a viable pathway for developing thermally stable, high-performance power devices essential for next-generation electric vehicle and renewable energy applications

The 4H-SiC VDMOSFET demonstrates a high reverse breakdown voltage (BV) due to the JFET region but experiences relatively high on-resistance (R_on). A widely adopted method to reduce the R_on is to uniformly increase the doping concentration of the JFET region, which results in a trade-off that reduces the BV. This study proposes a method to optimize the segmentation of the JFET region by selectively increasing the doping concentration using ‘total doping’, ‘half-doping’, and ‘quarter-doping’. The optimized quarter segment with a specific doping concentration slightly reduces BV, but the sharp decrease in specific on-resistance (R_on,sp) results in a 105% improvement in the performance index, Baliga’s Figure of Merit (BFOM). This research suggests the potential for electrically superior designs by modifying the doping concentration in the JFET region of conventional VDMOSFET structures.

4H-Silicon carbide (4H-SiC) is a promising material for power and harsh environment devices owing to its superior material properties, including wide bandgap, high critical electric field, and high thermal conductivity. However, despite the advantages of 4H-SiC, its channel mobility is reduced due to the high interface defect density between SiC and the oxide film, leading to increased device switching loss. Therefore, it is necessary to develop new fabrication methods to improve the quality of the SiO₂/4H-SiC interface. According to recent research, the effect of high-temperature (1,250~1,300℃) nitric oxide (NO) annealing on the interface states of SiO₂/4H-SiC and the channel mobility of 4H-SiC metal-oxide-semiconductor-field-effect transistors (MOSFETs) were investigated. Previous studies have optimized the NO post-oxidation annealing (POA) process, using N₂ diluted NO at 1,300℃ to reduce the high SiO₂/4H-SiC interface trap density (D_it). This paper focuses on high-temperature (1,250℃) 10% NO annealing to reduce interface defects by integrating nitrogen atoms into the oxide layer near the SiC interface, potentially increasing the channel mobility. Electrical properties such as D_it, threshold voltage (V_th), field-effect mobility (μ_FE), and specific on-resistance (R_on,sp) were assessed through capacitance-voltage (C-V) and current-voltage (I-V) measurements. It has been confirmed that the interface defect density of the gate oxide film was effectively improved under the POA conditions of 10% NO for 1 hour at 1,250℃.

In the era of the Fourth Industrial Revolution, electronic devices are becoming increasingly miniaturized and lightweight to overcome spatial limitations, necessitating lower power consumption. Triboelectric nanogenerators (TENGs), which convert mechanical energy into electrical energy, offer an ideal solution as small-scale power generators for these compact devices. Recent research has focused on various materials and structural designs to maximize the output of triboelectric energy harvesters, highlighting the growing importance of theoretical structure analysis software for precise evaluation. COMSOL Multiphysics software provides an accurate method for simulating the electrical characteristics of TENGs. This Tutorial Status Report introduces the process of modeling TENGs and analyzing their electrical output using COMSOL Multiphysics

Department of Electric Materials Engineering, Kwangwoon University, Seoul 01897, Korea (Received June 13, 2024; Revised July 8, 2024; Accepted July 10, 2024) Abstract: Wide bandgap (WBG) devices, especially SiC, are gaining traction as materials for high-power EV conversion devices due to their superior efficiency and switching capabilities compared to Si-based power devices. SiC allows for high power, high temperature, and high frequency applications because of its outstanding thermal conductivity, saturation velocity, and dielectric breakdown field. SiC-based MPS diodes combine the advantages of SiC-based SBDs and PiN diodes, allowing high-frequency switching operation with low leakage currents under high voltage conditions. However, MPS diodes exhibit snapback phenomena influenced by the P⁺ region’s size, necessitating optimization. A TCAD simulation studied the impact of the P+ region’s depth and width on MPS diode performance. Increasing the P⁺ width raised the On-specific resistance (R_on,sp) and lowered the maximum voltage during snapback (V_snap). Increasing the depth decreased both Breakdown voltage (BV) and V_snap. A trade-off between the semiconductor performance index BFOM and V_snap was identified, leading to optimized dimensions. The optimized MPS diode shows a low V_snap of about 3.89 V and a high BFOM of 1.72 GW·㎠, highlighting its potential as a next-generation high-performance power conversion device.

Physically Unclonable Functions (PUFs) provide a high level of security for private keys using unique physical characteristics of hardware. However, fabricating PUF chips requires numerous semiconductor processes, leading to high costs, which limits their applications. In this work, we introduce a low-cost manufacturing method for PUF security chips. First, surface roughening through wet-etching is utilized to create random variables. Additionally, physical vapor deposition is added to further enhance randomness. After PUF chip fabrication, both Hamming distance (HD) and Hamming weight (HW) are extracted and compared to verify the fabricated chip. It is confirmed that the PUF chip using two different multiple process variables demonstrates superior uniqueness and uniformity compared to the PUF security chip fabricated using only a single process variable.

High-energy bandgap material silicon carbide (SiC) is gaining attention as a next-generation power semiconductor material, and in particular, SiC-based MOSFETs are developed as representative power semiconductors to increase the breakdown voltage (BV) of conventional planar structures. However, as the size of SJ (Super Junction) MOSFET devices decreases and the depth of pillars increases, it becomes challenging to uniformly form the doping concentration of pillars. Therefore, a structure with different doping concentrations segmented within the pillar is being researched. Using Silvaco TCAD simulation, a SJ VVD (vertical variation doping profile) MOSFET with three different doping concentrations in the pillar was studied. Simulations were conducted for the width of the pillar and the doping concentration of N-epi, revealing that as the width of the pillar increases, the depletion region widens, leading to an increase in on-specific resistance (Ron,sp) and breakdown voltage (BV). Additionally, as the doping concentration of N-epi increases, the number of carriers increases, and the depletion region narrows, resulting in a decrease in Ron,sp and BV. The optimized SJ VVD MOSFET exhibits a very high figure of merit (BFOM) of 13,400 KW/cm², indicating excellent performance characteristics and suggesting its potential as a next-generation highperformance power device suitable for practical applications.

4H-SiC power metal-oxide-semiconductor field effect transistors (MOSFETs) have been developed to achieve lower specific-on-resistance (R_on,sp), and the gate oxides have been thermally grown. The poor channel mobility resulting from the high interface trap density (D_it) at the SiO₂/4H-SiC interface significantly affects the higher switching loss of the power device. Therefore, the development of novel fabrication processes to enhance the quality of the SiO₂/4H-SiC interface is required. In this paper, NO post-oxidation annealing (POA) by using the conditions of N₂ diluted NO at a high temperature (1,300℃) is proposed to reduce the high interface trap density resulting from thermal oxidation. The NO POA is carried out in various NO ambient (0, 10, 50, and 100% NO mixed with 100, 90, 50, and 0% of high purity N₂ gas to achieve the optimized condition while maintaining a high temperature (1,300℃). To confirm the optimized condition of the NO POA, measuring capacitance-voltage (C-V) and current-voltage (I-V), and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) are employed. It is confirmed that the POA condition of 50% NO at 1,300℃ facilitates the equilibrium state of both the oxidation and nitridation at the SiO₂/4H-SiC interface, thereby reducing the Dit.

Intrinsically stretchable light-emitting diodes, composed of stretchable electrodes, charge transport layers, and luminescent materials, have garnered significant interest for enhancing human well-being and advancing the field of deformable electronics. Various luminescent materials, such as perovskites and organics, have been integrated with stretchable elastomers to function as the stretchable emissive layers in these intrinsically stretchable LEDs. Stretchable conductors including Ag nanowire based percolating structures and conducting polymers have been utilized as stretchable transparent electrode. Despite this progress, their performances in terms of efficiency and stability remain challenging compared to their structurally stretchable and rigid LED counterparts. This review offers a comprehensive overview of recent advancements in intrinsically stretchable LEDs, focusing on material innovations.

Nickel oxide is a nonstoichiometric transparent conductive oxide with p-type conductivity, a wide-band energy gap of 3.4~4.0 eV, and excellent chemical stability, making it a very important candidate as a material for bipolar devices.P-type conductivity in Transparent Conductive Oxides (TCO) is controlled by the oxygen vacancy concentration. During the TCO film deposition process, additional oxygen diffusing into the NiO structure causes the formation of Ni 3p ions and Ni vacancies. This eventually affects the hole concentration of the p-type oxide thin film. In this work, the surface morphology and the electrical characteristics were confirmed in accordance with the annealing atmosphere of the nickel oxide thin film.

Despite otherwise advantageous properties, the performance and reliability of devices manufactured in ß-Ga₂O₃ on semi-insulating Ga₂O₃ substrates may degrade because of poorly mitigated self-heating, which results from the low thermal conductivity of Ga₂O₃ substrates. In this work, we investigate and compare self-heating and device performance of β-Ga₂O₃ MESFETs on substrates of semi-insulating Ga₂O₃ and 4H-SiC. Electron mobility in β-Ga₂O₃ is negatively affected by increasing lattice temperature, which consequently also negatively influences device conductance. The superior thermal conductivity of 4H-SiC substrates resulted in reduced ß-Ga₂O₃ lattice temperatures and, thus, mitigates MESFET drain current degradation. This, in turn, allows practically reduced device dimensions without deteriorating the performance and improved device reliability.

In the 4^th industrial age, electronic devices are becoming smaller and lighter with a low power consumption to overcome spatial limitation. The piezoelectric energy harvesters can convert mechanical kinetic energy into electric energy; thus, enabling the operation of small electronic devices. Recently, various piezoelectric harvesters have been reported and the electric output from these harvesters could be anticipated by theoretical analysis methods. For example, COMSOL Multiphysics software provides a theoretical simulation of piezoelectric effect with a combination of mechanical and electrical phenomena in the piezoelectric materials. This article introduces a brief modeling of piezoelectric harvester to investigate mechanical stress and electrical output of harvesting devices by the COMSOL Multiphysics software.

We investigated deep levels in n-type 4H-SiC epitaxy layer of the Schottky barrier diodes (SBD) and Junction Barrier Schottky (JBS) diodes by using deep level transient spectroscopy (DLTS). The I-V characteristics of the JBS devices show ~100 times lower leakage current level than SBDs owing to the grid structures in JBS. The reliable responses of the diodes for deep level transient analysis showed from C-V characteristics. Several deep electron traps were revealed by DLTS measurements in epitaxial layers in 4H-SiC. In both types of diodes, the peaks corresponding to shallow energy levels were observed with slightly different values of 0.132 eV for JBS and 0.186 eV for SBDs. The two remarkable deep level peaks (J2 and J3) have been obtained with 0.257 eV and 0.273 eV in JBS, and they were analyzed to have a similar trap concentration of ~10¹⁴ cm^-3. The comparison results showed that the defects could be related with device fabrication procedures such as ion-implantation and growth.

The Ti₃SiC₂ MAX phase was synthesized by arc-melting process under three different processing times. We confirmed that the reaction between the TiCX phase and Ti-Si liquid phase is important for the synthesis of the Ti₃SiC₂ MAX phase. Results suggest that the Ti₃SiC₂ MAX phase decomposed when the arc-melting time was greater than 80s. Herein, we aim to determine the detailed parameters for the reported arc-melting process, which can provide useful insights on the synthesis of the Ti₃SiC₂ MAX phase by arc-melting process. Furthermore, we compared the electrical characteristics and densities of the three samples.

In this letter, we propose and analyze a new asymmetric structure that can be used for next-generation power semiconductor devices. We compare and analyze the electrical characteristics of the proposed device with respect to those of symmetric devices. The proposed device has a p-emitter on the right side of the cell. The peak electric field is reduced by the shielding effect caused by the p-emitter structure. Consequently, the breakdown voltage is increased. The proposed asymmetric structure has an approximately 100% higher Baliga’s figure of merit (~94.22 MW/cm²) than the symmetric structure (~46.93 MW/cm²), and the breakdown voltage of the device increases by approximately 70%.

The top seeded solution growth (TSSG) method is an alternative technique to grow high-quality SiC crystals that has been actively studied for the last two decades. However, the TSSG method has different issues that need to be resolved when compared to the commercial SiC crystal growing method, i.e., physical vapor transport (PVT). A particular issue of the TSSG method of results from the presence of liquid droplets on the grown crystal that can remain even after crystal growth; this induces residual stress on the crystal surface. Hence, the residual droplet causes several unwanted effects on the crystal such as the initiation of micro-cracks, micro-pipes, and polytype inclusions. Therefore, this study investigated the formation of the residual droplet through multiphysics simulations and lead to the development of a liquid droplet removal method. As a result, we found that although residual liquid droplets significantly apply residual stress on the grown crystal, these could be vaporized by adopting thermal annealing processes after the relevant crystal growing steps.

In order to fabricate high-quality SiC substrates for power electronic devices, various single crystal growing methods were prepared. These include the physical vapor transport (PVT) and top seeded solution growth (TSSG) methods. All the suggested SiC growth methods generally use induction-heating furnaces. The temperature distribution in this system can be easily adjusted by changing the hot-zone design. Moreover, precise temperature control in the induction-heating furnace is favorably required to grow a high-quality crystal. Therefore, in this study, we analyzed the heat transfer in these furnaces to grow SiC crystals. As the growth temperature of SiC crystals is very high, we evaluated the effect of radiation heat transfer on the temperature distribution in induction-heating furnaces. Based on our simulation results, a heat transfer strategy that controls the radiation heat transfer was suggested to obtain the optimal temperature distribution in the PVT and TSSG methods.

In this work, we have investigated the effect of a 30-min thermal anneal at 550℃ on the electrical characteristics of neutron-irradiated 4H-SiC MOSFETs. Thermal annealing can recover the on/off characteristics of neutron-irradiated 4H-SiC MOSFETs. After thermal annealing, the interface-trap density decreased and the effective mobility increased in terms of the on-characteristics. This finding could be due to the improvement of the interfacial state from thermal annealing and the reduction in Coulomb scattering due to the reduction in interface traps. Additionally, in terms of the off-characteristics, the thermal annealing resulted in the recovery of the breakdown voltage and leakage current. After the thermal annealing, the number of positive trapped charges at the MOSFET interface was decreased.

Using a vanadium dioxide (VO₂) source, highly pure and amorphous vanadium oxide (VO) thin films were deposited using an e-beam evaporator at room temperature and high vacuum (<10^-7 Torr). Then, by controlling the post-annealing conditions such as N₂：O₂ pressure ratio and annealing time, we could easily synthesize a homogeneous VO₂ thin film and also mixed-phase VO thin films, including VO₂, V₂O₅, V₃O₇, V₅O₉, and V₆O₁₃. The crystallinity and phase of these were characterized by X-ray diffraction, and the surface morphology by FE-SEM. Moreover, the electrical properties and ethanol sensing measurements of the VO thin films were analyzed as a function of temperature. In general, mixed-phases as a self-doping effect have enhanced electrical properties, with a high carrier density and an enhanced response to ethanol. In summary, we developed an easy, scalable, and reproducible fabrication process for VO thin films that is a promising candidate for many potential electrical and optical applications.

In this work, static characteristics of 4H-SiC SJ-ACCUFETs were obtained by adjusting the p-pillar region. The structure of this SJ-ACCUFET was designed by using a two-dimensional simulator. The static characteristics of SJ-ACCUFET, such as the breakdown voltages, on-resistance, and figure of merits, were obtained by varying the p-pillar doping concentration from 1×10¹⁵ cm^-3 to 5×10¹⁶ cm^-3 and the thickness from 0 μm to 9 μm. The doping concentration and the thickness of p-pillar region are closely related to the break down voltage and on-resistance and threshold voltages. Hence a silicon carbide SJ-ACCUFET structure with highly intensified breakdown voltages and low on-resistances with good figure of merits can be achieved by optimizing the p-pillar thickness and doping concentration.

We investigated a SiC-based hydrogen gas sensor with MIS (metal-insulator-semiconductor) structure for high temperature applications. The sensor was fabricated by Pd/TiO₂/SiC structure, and a thin titanium dioxide (TiO₂) layer was exploited for sensitivity improvement. In the experiment, dependences of I-V characteristics and capacitance response properties on hydrogen gas concentrations from 0 to 2,000 ppm were analyzed at room temperature to 400℃. As the result, our sensor using TiO₂ dielectric layer showed possibilities with regard to use in hydrogen gas sensors for high-temperature applications.

In this study, in order to develop composition ceramics for Acoustic Emission (abbreviated as AE) sensor application, the PZT system ceramics was fabricated by conventional solid state reaction method. When x=0.48, the density, electromechanical coupling factor(kp), piezoelectric coefficient d₃₃ and piezoelectric voltage constant g₃₃ of the maximum values of 7.857 g/cm₃, 0.51, 190[pC/N], 52[10-₃mV/N] were obtained, respectively, suitable for AE sensor.

The temperature dependent characteristics on the properties of SiC Schottky Diode has beeninvestigated. In this study, the temperature dependent current-voltage characteristics of the SiC Schottkydiode were measured in the range of 300 ∼ 500 K. Divided into pre- and post- irradiated device wasmeasured. The barrier height after irradiation device at 500 K increased 0.15 eV compared to 300 K, thebarrier height of pre- neutron irradiated Schottky diode increased 0.07 eV. The effective barrier heightafter irradiation increased from 0.89 eV to 1.05 eV. And ideality factor of neutron irradiated Schottkydiode at 500 K decreased 0.428 compared to 300 K, the ideality factor of pre- neutron irradiated Schottkydiode decreased 0.354. Also, a slight positive shift in threshold voltage from 0.53 to 0.68 V. we analyzedthe effective barrier height and ideality factor of SiC Schottky diode as function of temperature.

In this study, the electrical characteristics of the nickel (Ni)/carbon nanotube (CNT)/SiO2structures were investigated in order to analyze the mechanism of CNT in MOS device structures. We fabricated 4H-SiC MOS capacitors with or without CNTs. CNT was dispersed by isopropyl alcohol. The capacitance-voltage (C-V) and current-voltage (I-V) are characterized. Both devices were measured by Keithley 4200 SCS. The experimental flatb and voltage (VFB) shift was positive. Near-interface trap charge density (Nit) and negative oxide trap charge density (Nox) value of CNT embedded MOS capacitors was less than that values of reference samples. Also, the leakage current of CNT embedded MOS capacitorsis higher than reference samples. It has been found that its oxide quality is related to charge carriers and/or defect states in the interface of MOS capacitors.

Al2O3 films on silicon carbide were fabricated by Aerosol deposition with annealing temperatureat 800℃ and 1,000℃. The effect of thermal treatment on physical properties of Al2O3 thin films has beeninvestigated by XRD (X-ray diffraction), AFM (atomic force microscope), SEM (scanning electronmicroscope), and AES (auger electron spectroscopy). Also electrical properties have been investigated byKeithley 4,200 semiconductor parameter analyzer to explain the interface trapped charge density (Dit),flatband voltage (VFB) and leakage current (Io). Al2O3 films become crystallized with increasingtemperature by calculating full width at half maximum (FWHM) of diffraction peaks, also surfacemorphology is observed by topography measurement in non-contact mode AFM. Dit was 2.26×10-12eV-1.cm-2 at 800℃ annealed sample, which is the lowest value in all samples. Also the sample annealedat 800℃ has the lowest leakage current of 4.89×10-13 A.

In this paper, we studied the magnetic composite sheets for electromagnetic wave noise absorber of quasi-microwave band by using soft magnetic FeSiCr and Fe50Ni flakes with the thickness of about 1 μm and polymer. The magnetic hysteresis curve including saturation magnetization and residual magnetization and the complex permeability characteristics of the composite sheets were investigated to clarify the mixing effect on electromagnetic wave absorption properties. The saturation magnetization was decreased about 10% while the residual magnetization was increased about 15% and the real parts of complex permeability at below 500 MHz were increased 0.6～4 while those values at above 500 MHz were decreased 0.4～2.5 according to the change of contents of FeSiCr and Fe50Nipowders. As a result, the reflection loss can be moved to the lower frequency from 2∼3 GHz to 1∼1.5GHz as the contents of Fe50Ni flaky powder into FeSiCr flaky powder was increased up to 50%.

The effect of neutron irradiation on the properties of SiC Schottky Diode has been investigated. SiC Schottky diodes were irradiated under neutron fluences and compared to the reference samples to study the radiation-induced changes in device properties. The condition of neutron irradiation was 3.1×1010n/cm2. The current density after irradiation decreased from 12.7 to 0.75 A/cm2. Also, a slight positive shift (ΔVth= 0.15 V) in threshold voltage from 0.53 to 0.68 V and a positive change (ΔΦB= 0.16 eV) of barrier height from 0.89 to 1.05 eV have been observed by the neutron irradiation, which is attributed to charge damage in the interface between the metal and the SiC layer.

SiC crystal ingots were grown on 6H-SiC dual-seed crystals with different surface roughness and different seed orientation by a PVT (Physical Vapor Transport) method. 4H and 15R-SiC were grown on seed crystal with high root-mean-square (rms) value. The polytype of grown crystal on the seed crystal with lower rms value was confirmed to be 6H-SiC. On the other hand, all SiC crystals grown on seed crystals with different seed orientation were proven to be 6H-SiC. The surface roughness of seed crystals had no effect on the crystal structure of the grown crystals. However, the crystal quality of 6H-SiC single crystals grown on the on-axis seed were revealed to be slightly better than that of 6H-SiC crystal grown on the off-axis seed.