Skip to main navigation Skip to main content
  • KIEEME

J Electr Electron Mater : Journal of Electrical and Electronic Materials

OPEN ACCESS
ABOUT
BROWSE ARTICLES
EDITORIAL POLICIES
FOR CONTRIBUTORS

Page Path

53
results for

"Junction"

Keywords

Publication year

Authors

"Junction"

Characteristic of Cu₂O/CuO Thin Films Fabricated by FTS System Based on Oxygen Flow Ratio
Suji Kim, Jihyung Kim, Kyunghwan Kim, Jeongsoo Hong
J Korean Inst Electr Electron Mater Eng 2025;38(2):193-199.   Published online March 1, 2025
DOI: https://doi.org/10.4313/JKEM.2025.38.2.10
In this study, copper oxide thin films were fabricated by facing target sputtering system and their structural, optical, and electrical properties were investigated. Crystal phase of samples were changed by variation of oxygen flow rate from Cu to Cu₂O and CuO. Compared to Cu metal film, electrical properties of Cu₂O and CuO were relatively degraded, however, asfabricated Cu₂O and CuO indicated still low resistivity (~10-3 Ω·cm) and high carrier concentration (~1019 cm-3). From the results, it is thought that the copper oxide thin films Cu₂O fabricated under optimal conditions can be applied to various optoelectronic devices including ultraviolet photodetector.
  • 86 View
  • 0 Download
Impact of Hydrogen-Doped Indium Oxide Films on the Performance of Silicon Heterojunction Solar Cells
Hyeong Gi Park, Jaehyeong Lee, Junsin Yi
J Korean Inst Electr Electron Mater Eng 2024;37(6):582-589.   Published online November 1, 2024
DOI: https://doi.org/10.4313/JKEM.2024.37.6.2
We investigated the potential of IO:H thin films and hydrogen doping to improve current density and fill factor for enhancing the performance of silicon heterojunction solar cells. We revealed that a transmittance of 86.7% and work function of 5.4 eV could be achieved by injecting 3 sccm of hydrogen gas. The lattice constant of 1.037 nm at the AB site indicates an anion antibonding tendency, and the work function increases as the Fermi level shifts to the valence band. Based on these findings, we fabricated a silicon heterojunction solar cell and achieved an efficiency of 18.53%, while computer simulation confirmed a conversion efficiency of 24.65%, an open-circuit voltage of 724 mV, and a fill factor of 82.72% at a current density of 41.15 mA/㎠.

Citations

Citations to this article as recorded by  
  • A Review on Energy Yield Enhancement Characteristics of Bifacial Photovoltaic Systems Combined with Solar Tracking
    Hyeong Gi Park
    Journal of Electrical and Electronic Materials.2026; 39(4): 309.     CrossRef
  • 167 View
  • 1 Download
  • 1 Crossref
Optimization of 1.2 kV 4H-SiC MOSFETs with Vertical Variation Doping Structure
Ye-jin Kim, Seung-hyun Park, Tae-hee Lee, Ji-soo Choi, Se-rim Park, Geon-hee Lee, Jong-min Oh, Weon Ho Shin, Sang-mo Koo
J Korean Inst Electr Electron Mater Eng 2024;37(3):332-336.   Published online May 1, 2024
DOI: https://doi.org/10.4313/JKEM.2024.37.3.15
High-energy bandgap material silicon carbide (SiC) is gaining attention as a next-generation power semiconductor material, and in particular, SiC-based MOSFETs are developed as representative power semiconductors to increase the breakdown voltage (BV) of conventional planar structures. However, as the size of SJ (Super Junction) MOSFET devices decreases and the depth of pillars increases, it becomes challenging to uniformly form the doping concentration of pillars. Therefore, a structure with different doping concentrations segmented within the pillar is being researched. Using Silvaco TCAD simulation, a SJ VVD (vertical variation doping profile) MOSFET with three different doping concentrations in the pillar was studied. Simulations were conducted for the width of the pillar and the doping concentration of N-epi, revealing that as the width of the pillar increases, the depletion region widens, leading to an increase in on-specific resistance (Ron,sp) and breakdown voltage (BV). Additionally, as the doping concentration of N-epi increases, the number of carriers increases, and the depletion region narrows, resulting in a decrease in Ron,sp and BV. The optimized SJ VVD MOSFET exhibits a very high figure of merit (BFOM) of 13,400 KW/cm2, indicating excellent performance characteristics and suggesting its potential as a next-generation highperformance power device suitable for practical applications.
  • 93 View
  • 0 Download
Electrical Characterization of Lateral NiO/Ga2O3 FETs with Heterojunction Gate Structure
Geon-hee Lee, Soo-young Moon, Hyung-jin Lee, Myeong-cheol Shin, Ye-jin Kim, Ga-yeon Jeon, Jong-min Oh, Weon-ho Shin, Min-kyung Kim, Cheol-hwan Park, Sang-mo Koo
J Korean Inst Electr Electron Mater Eng 2023;36(4):413-417.   Published online July 1, 2023
DOI: https://doi.org/10.4313/JKEM.2023.36.4.14
Gallium Oxide (Ga2O3) is preferred as a material for next generation power semiconductors. The Ga2O3 should solve the disadvantages of low thermal resistance characteristics and difficulty in forming an inversion layer through p-type ion implantation. However, Ga2O3 is difficult to inject p-type ions, so it is being studied in a heterojunction structure using p-type oxides, such as NiO, SnO, and Cu2O. Research the lateral-type FET structure of NiO/Ga2O3 heterojunction under the Gate contact using the Sentaurus TCAD simulation. At this time, the VG-ID and VD-ID curves were identified by the thickness of the Epi-region (channel) and the doping concentration of NiO of 1 × 1017 to 1 × 1019 cm-3. The increase in Epi region thickness has a lower threshold voltage from -4.4 V to -9.3 V at ID = 1 × 10-8 mA/mm, as current does not flow only when the depletion of the PN junction extends to the Epi/Sub interface. As an increase of NiO doping concentration, increases the depletion area in Ga2O3 region and a high electric field distribution on PN junction, and thus the breakdown voltage increases from 512 V to 636 V at ID =1 × 10-3 A/mm.
  • 78 View
  • 0 Download
Photo-Transistors Based on Bulk-Heterojunction Organic Semiconductors for Underwater Visible-Light Communications
Jeong-min Lee, Sung Yong Seo, Young Soo Lim, Kang-jun Baeg
J Korean Inst Electr Electron Mater Eng 2023;36(2):143-150.   Published online March 1, 2023
DOI: https://doi.org/10.4313/JKEM.2023.36.2.6
Underwater wireless communication is a challenging issue for realizing the smart aqua-farm and various marine activities for exploring the ocean and environmental monitoring. In comparison to acoustic and radio frequency technologies, the visible light communication is the most promising method to transmit data with a higher speed in complex underwater environments. To send data at a speedier rate, high-performance photodetectors are essentially required to receive blue and/or cyan-blue light that are transmitted from the light sources in a light-fidelity (Li-Fi) system. Here, we fabricated high-performance organic phototransistors (OPTs) based on P-type donor polymer (PTO2) and N-type acceptor small molecule (IT-4F) blend semiconductors. Bulk-heterojunction (BHJ) PTO2:IT-4F photo-active layer has a broad absorption spectrum in the range of 450~550 nm wavelength. Solution-processed OPTs showed a high photo-responsivity >1,000 mA/W, a large photo-sensitivity >103, a fast response time, and reproducible light-On/Off switching characteristics even under a weak incident light. BHJ organic semiconductors absorbed photons and generated excitons, and efficiently dissociated to electron and hole carriers at the donor-acceptor interface. Printed and flexible OPTs can be widely used as Li-Fi receivers and image sensors for underwater communication and underwater internet of things (UIoTs).
  • 71 View
  • 0 Download
Analytical Model of Threshold Voltage for Negative Capacitance Junctionless Double Gate MOSFET Using Ferroelectric
Hakkee Jung
J Korean Inst Electr Electron Mater Eng 2023;36(2):129-135.   Published online March 1, 2023
DOI: https://doi.org/10.4313/JKEM.2023.36.2.4
An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔVth of a junctionless double gate MOSFET using ferroelectric-metal-SiO2 as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔVth=0.
  • 70 View
  • 0 Download
Self-Supporting 3D-Graphene/MnO2 Composite Supercapacitors with High Stability
Zhaoyang Han, Sang-hee Son
J Korean Inst Electr Electron Mater Eng 2023;36(2):175-185.   Published online March 1, 2023
DOI: https://doi.org/10.4313/JKEM.2023.36.2.11
A hybrid supercapacitor is a promising energy storage device in view of its excellent capacitive performance. Commercial three-dimensional foam nickel (Ni) can be used as an ideal framework due to an interconnected network structure. However, its application as an electrode material for supercapacitors is limited due to its low specific capacity. Herein, we report a successful growth of MnO2 on the surface of graphene by a one-step hydrothermal method; thus, forming a three-dimensional MnO2-graphene-Ni hybrid foam. Our results show that the mixed structure of MnO2 with nanoflowers and nanorods grown on the graphene/Ni foam as a hybrid electrode delivers the maximum specific capacitance of 193 F·g-1 at a current density 0.1 A·g-1. More importantly, the hybrid electrode retains 104% of its initial capacitance after 1,000 charge-discharge cycles at 1 A·g-1; thus, showing the potential application as a stable supercapacitor electrode.
  • 68 View
  • 1 Download
Analysis on Subthreshold Swing of Asymmetric Junctionless Double Gate MOSFET for Parameters for Gaussian Function
Hakkee Jung
J Korean Inst Electr Electron Mater Eng 2022;35(3):255-263.   Published online May 1, 2022
DOI: https://doi.org/10.4313/JKEM.2022.35.3.7
The subthreshold swing (SS) of an asymmetric junctionless double gate (AJLDG) MOSFET is analyzed by the use of Gaussian function. In the asymmetric structure, the thickness of the top/bottom oxide film and the flat-band voltages of top gate (Vfbf) and bottom gate (Vfbb) could be made differently, so the change in the SS for these factors is analyzed with the projected range and standard projected deviation which are parameters for the Gaussian function. An analytical subthreshold swing model is presented from the Poisson’s equation, and it is shown that this model is in a good agreement with the numerical model. As a result, the SS changes linearly according to the geometric mean of the top and bottom oxide film thicknesses, and if the projected range is less than half of the silicon thickness, the SS decreases as the top gate oxide film is smaller. Conversely, if the projected range is bigger than a half of the silicon thickness, the SS decreases as the bottom gate oxide film is smaller. In addition, the SS decreases as Vfbb-Vfbf increases when the projected range is near the top gate, and the SS decreases as Vfbb-Vfbf decreases when the projected range is near the bottom gate. It is necessary that one should pay attention to the selection of the top/bottom oxide thickness and the gate metal in order to reduce the SS when designing an AJLDG MOSFET.
  • 61 View
  • 0 Download
Electrical Properties for Enhanced Band Offset and Tunneling with a-SiOx:H/a-si Structure
Hongrae Kim, Duy Phong Pham, Donghyun Oh, Somin Park, Matheus Rabelo, Youngkuk Kim, Junsin Yi
J Korean Inst Electr Electron Mater Eng 2021;34(4):251-255.   Published online July 1, 2021
DOI: https://doi.org/10.4313/JKEM.2021.34.4.251
a-Si is commonly considered as a primary candidate for the formation of passivation layer in heterojunction (HIT) solar cells. However, there are some problems when using this material such as significant losses due to recombination and parasitic absorption. To reduce these problems, a wide bandgap material is needed. A wide bandgap has a positive influence on effective transmittance, reduction of the parasitic absorption, and prevention of unnecessary epitaxial growth. In this paper, the adoption of a-SiOx:H as the intrinsic layer was discussed. To increase lifetime and conductivity, oxygen concentration control is crucial because it is correlated with the thickness, bonding defect, interface density (Dit), and band offset. A thick oxygenrich layer causes the lifetime and the implied open-circuit voltage to drop. Furthermore the thicker the layer gets, the more free hydrogen atoms are etched in thin films, which worsens the passivation quality and the efficiency of solar cells. Previous studies revealed that the lifetime and the implied voltage decreased when the a-SiOx thickness went beyond around 9 nm. In addition to this, oxygen acted as a defect in the intrinsic layer. The Dit increased up to an oxygen rate on the order of 8%. Beyond 8%, the Dit was constant. By controlling the oxygen concentration properly and achieving a thin layer, high-efficiency HIT solar cells can be fabricated.
  • 73 View
  • 1 Download
Deep Level Defect Transient Spectroscopy Analysis of 4H-SiC SBD and JBS Diodes
Dong-wook Byun, Myeong-cheol Shin, Jeong Hyun Moon, Wook Bahng, Weon Ho Shin, Jong-min Oh, Chulhwan Park, Sang-mo Koo
J Korean Inst Electr Electron Mater Eng 2021;34(3):214-219.   Published online May 1, 2021
DOI: https://doi.org/10.4313/JKEM.2021.34.3.214
We investigated deep levels in n-type 4H-SiC epitaxy layer of the Schottky barrier diodes (SBD) and Junction Barrier Schottky (JBS) diodes by using deep level transient spectroscopy (DLTS). The I-V characteristics of the JBS devices show ~100 times lower leakage current level than SBDs owing to the grid structures in JBS. The reliable responses of the diodes for deep level transient analysis showed from C-V characteristics. Several deep electron traps were revealed by DLTS measurements in epitaxial layers in 4H-SiC. In both types of diodes, the peaks corresponding to shallow energy levels were observed with slightly different values of 0.132 eV for JBS and 0.186 eV for SBDs. The two remarkable deep level peaks (J2 and J3) have been obtained with 0.257 eV and 0.273 eV in JBS, and they were analyzed to have a similar trap concentration of ~1014 cm-3. The comparison results showed that the defects could be related with device fabrication procedures such as ion-implantation and growth.
  • 70 View
  • 0 Download
Subthreshold Swing Model Using Scale Length for Symmetric Junctionless Double Gate MOSFET
Hak Kee Jung
J Korean Inst Electr Electron Mater Eng 2021;34(2):142-147.   Published online March 1, 2021
DOI: https://doi.org/10.4313/JKEM.2021.34.2.142
We present a subthreshold swing model for a symmetric junctionless double gate MOSFET. The scale length λ1 required to obtain the potential distribution using the Poisson's equation is a criterion for analyzing the short channel effect by an analytical model. In general, if the channel length Lg satisfies Lg > 1.5λ1, it is known that the analytical model can be sufficiently used to analyze short channel effects. The scale length varies depending on the channel and oxide thickness as well as the dielectric constant of the channel and the oxide film. In this paper, we obtain the scale length for a constant permittivity (silicon and silicon dioxide), and derive the relationship between the scale length and the channel length satisfying the error range within 5%, compared with a numerical method. As a result, when the thickness of the oxide film is reduced to 1 nm, even in the case of Lg < λ1, the analytical subthreshold swing model proposed in this paper is observed to satisfy the error range of 5%. However, if the oxide thickness is increased to 3 nm and the channel thickness decreased to 6 nm, the analytical model can be used only for the channel length of Lg > 1.8 λ1.
  • 67 View
  • 0 Download
Variations in Tunnel Electroresistance for Ferroelectric Tunnel Junctions Using Atomic Layer Deposited Al doped HfO2 Thin Films
Soo Hyun Bae, So-jung Yoon, Dae-hong Min, Sung-min Yoon
J Korean Inst Electr Electron Mater Eng 2020;33(6):433-438.   Published online November 1, 2020
DOI: https://doi.org/10.4313/JKEM.2021.33.6.1
To enhance the tunneling electroresistance (TER) ratio of a ferroelectric tunnel junction (FTJ) device using Al-doped HfO2 thin films, a thin insulating layer was prepared on a TiN bottom electrode, for which TiN was preliminarily treated at various temperatures in O2 ambient. The composition and thickness of the inserted insulating layer were optimized at 600℃ and 50 Torr, and the FTJ showed a high TER ratio of 430. During the heat treatments, a titanium oxide layer formed on the surface of TiN, that suppressed oxygen vacancy generation in the ferroelectric thin film. It was found that the fabricated FTJ device exhibits two distinct resistance states with higher tunneling currents by properly heat-treating the TiN bottom electrode of the HfO2-based FTJ devices in O2 ambient.
  • 57 View
  • 0 Download
Study on Reliability of Vapor Cell by Laser Packaging with Au/Au-Sn Heterojunction
Jin Gu Kwon, Yong Min Jeon, Ji Young Kim, Eun Byeol Lee, Seong Eui Lee
J Korean Inst Electr Electron Mater Eng 2020;33(5):367-372.   Published online September 1, 2020
DOI: https://doi.org/10.4313/JKEM.2021.33.5.6
As packaging processes for atomic gyroscope vapor cells, the glass tube tip-off process, anodic bonding, and paste sealing have been widely studied. However, there are stability issues in the alkali metal which are caused by impurity elements and leakage during high-temperature processes. In this study, we investigated the applicability of a vapor cell low-temperature packaging process by depositing Au on a Pyrex cell in addition to forming an Au-Sn thin film on a cap to cover the cell, followed by laser irradiation of the Au/Au-Sn interface. The mechanism of the thin film bonding was evaluated by XRD, while the packaging reliability of an Ne gas-filled vapor cell was characterized by variation of plasma discharge behavior with time. Furthermore, we confirmed that the Rb alkaline metal inside the vapor cell showed no color change, indicating no oxidation occurred during the process.
  • 68 View
  • 0 Download
Diffusion Model of Aluminium for the Formation of a Deep Junction in Silicon
Won-chae Jung
J Korean Inst Electr Electron Mater Eng 2020;33(4):263-270.   Published online July 1, 2020
DOI: https://doi.org/10.4313/JKEM.2021.33.4.3
In this study, the physical mechanism and diffusion effects in aluminium implanted silicon was investigated. For fabricating power semiconductor devices, an aluminum implantation can be used as an emitter and a long drift region in a power diode, transistor, and thyristor. Thermal treatment with O2 gas exhibited to a remarkably deeper profile than inert gas with N2 in the depth of junction structure. The redistribution of aluminum implanted through via thermal annealing exhibited oxidation-enhanced diffusion in comparison with inert gas atmosphere. To investigate doping distribution for implantation and diffusion experiments, spreading resistance and secondary ion mass spectrometer tools were used for the measurements. For the deep-junction structure of these experiments, aluminum implantation and diffusion exhibited a junction depth around 20 μm for the fabrication of power silicon devices.
  • 55 View
  • 0 Download
Analysis of Electrical Characteristics According to the Pillar Spacing of 4.5 kV Super Junction IGBT
Geon Hee Lee, Byoung Sup Ahn, Ey Goo Kang
J Korean Inst Electr Electron Mater Eng 2020;33(3):173-176.   Published online May 1, 2020
DOI: https://doi.org/10.4313/JKEM.2021.33.3.3
This study focuses on a pillar in which is implanted a P-type maneuver under a P base. This structure is called a super junction structure. By inserting the pillar, the electric field concentrated on the P base is shared by the pillar, so the columns can be dispersed while maintaining a high breakdown voltage. Ten pillars were generated during the multi epitaxial process. The interval between pillars is varied to optimize the electric field to be concentrated on the pillar at a threshold voltage of 6 V, a yield voltage of 4,500 V, and an on-state voltage drop of 3.8 V. The density of the filler gradually decreased when the interval was extended by implanting a filler with the same density. The results confirmed that the size of the depletion layer between the filler and the N-epitaxy layer was reduced, and the current flowing along the N-epitaxy layer was increased. As the interval between the fillers decreased, the cost of the epitaxial process also decreased. However, it is possible to confirm the trade-off relationship that deteriorated the electrical characteristics and efficiency.
  • 56 View
  • 0 Download
Development of 900 V Class MOSFET for Industrial Power Modules
Hunsuk Chung
J Korean Inst Electr Electron Mater Eng 2020;33(2):109-113.   Published online March 1, 2020
DOI: https://doi.org/10.4313/JKEM.2021.33.2.6
A power device is a component used as a switch or rectifier in power electronics to control high voltages. Consequently, power devices are used to improve the efficiency of electric-vehicle (EV) chargers, new energy generators, welders, and switched-mode power supplies (SMPS). Power device designs, which require high voltage, high efficiency, and high reliability, are typically based on MOSFET (metal-oxide-semiconductor field-effect transistor) and IGBT (insulated-gate bipolar transistor) structures. As a unipolar device, a MOSFET has the advantage of relatively fast switching and low tail current at turn-off compared to IGBT-based devices, which are built on bipolar structures. A superjunction structure adds a p-base region to allow a higher yield voltage due to lower RDS (on) and field dispersion than previous p-base components, significantly reducing the total gate charge. To verify the basic characteristics of the superjunction, we worked with a planar type MOSFET and Synopsys’ process simulation T-CAD tool. A basic structure of the superjunction MOSFET was produced and its changing electrical characteristics, tested under a number of environmental variables, were analyzed.
  • 56 View
  • 0 Download
Characteristics of Ga2O3/4H-SiC Heterojunction Diode with Annealing Process
Young-jae Lee, Sang-mo Koo
J Korean Inst Electr Electron Mater Eng 2020;33(2):155-160.   Published online March 1, 2020
DOI: https://doi.org/10.4313/JKEM.2021.33.2.15
Ga2O3/n-type 4H-SiC heterojunction diodes were fabricated by RF magnetron sputtering. The optical properties of Ga2O3 and electrical properties of diodes were investigated. I-V characteristics were compared with simulation data from the Atlas software. The band gap of Ga2O3 was changed from 5.01 eV to 4.88 eV through oxygen annealing. The doping concentration of Ga2O3 was extracted from C-V characteristics. The annealed oxygen exhibited twice higher doping concentration. The annealed diodes showed improved turn-on voltage (0.99 V) and lower leakage current (3 pA). Furthermore, the oxygen-annealed diodes exhibited a temperature cross-point when temperature increased, and its ideality factor was lower than that of as-grown diodes.
  • 58 View
  • 0 Download
Analysis of Threshold Voltage Roll-Off and Drain Induced Barrier Lowering in Junction-Based and Junctionless Double Gate MOSFET
Hak Kee Jung
J Korean Inst Electr Electron Mater Eng 2019;32(2):104-109.   Published online March 1, 2019
DOI: https://doi.org/10.4313/JKEM.2019.32.2.104
An analytical threshold voltage model is proposed to analyze the threshold voltage roll-off and drain-induced barrier lowering (DIBL) for a junction-based double-gate (JBDG) MOSFET and a junction-less double-gate (JLDG) MOSFET. We used the series-type potential distribution function derived from the Poisson equation, and observed that it is sufficient to use n=1 due to the drastic decrease in eigenvalues when increasing the n of the series-type potential function. The threshold voltage derived from this threshold voltage model was in good agreement with the result of TCAD simulation. The threshold voltage roll-off of the JBDG MOSFET was about 57% better than that of the JLDG MOSFET for a channel length of 25 nm, channel thickness of 10 nm, and oxide thickness of 2 nm. The DIBL of the JBDG MOSFET was about 12% better than that of the JLDG MOSFET, at a gate metal work-function of 5 eV. It was also found that decreasing the work-function of the gate metal significantly reduces the DIBL.
  • 64 View
  • 0 Download
SPICE Model of Drain Induced Barrier Lowering in Junctionless Cylindrical Surrounding Gate (JLCSG) MOSFET
Hak Kee Jung
J Korean Inst Electr Electron Mater Eng 2018;31(5):278-282.   Published online July 1, 2018
DOI: https://doi.org/10.4313/JKEM.2018.31.5.278
We propose a SPICE model of drain-induced barrier lowering (DIBL) for a junctionless cylindrical surrounding gate (JLCSG) MOSFETs. To this end, the potential distribution in the channel is obtained via the Poisson equation, and the threshold voltage model is presented for the JLCSG MOSFET. In a JLCSG nano-structured MOSFET, a channel radius affects the carrier transfer as well as the channel length and oxide thickness; therefore, DIBL should be expressed as a function of channel length, channel radius, and oxide thickness. Consequently, it can be seen that DIBLs are proportional to the power of -3 for the channel length, 2 for the channel radius, 1 for the thickness of the oxide film, and the constant of proportionality is 18.5 when the SPICE parameter, the static feedback coefficient η, is between 0.2 and 1.0. In particular, as the channel radius and the oxide film thickness increase, the value of η remains nearly constant.
  • 68 View
  • 0 Download
The Effects of Lithium-Incorporated on N-ZTO/P-SiC Heterojunction Diodes by Using a Solution Process
Hyun-soo Lee, Sung-joon Park, Jae-in An, Seulki Cho, Sang-mo Koo
J Korean Inst Electr Electron Mater Eng 2018;31(4):203-207.   Published online May 1, 2018
DOI: https://doi.org/10.4313/JKEM.2018.31.4.203
In this work, we investigate the effects of lithium doping on the electric performance of solution-processed n-type zinc tin oxide (ZTO)/p-type silicon carbide (SiC) heterojunction diode structures. The proper amount of lithium doping not only affects the carrier concentration and interface quality but also influences the temperature sensitivity of the series resistance and activation energy. We confirmed that the device characteristics vary with lithium doping at concentrations of 0, 10, and 20 wt%. In particular, the highest rectification ratio of 1.89×107 and the lowest trap density of 4.829×1,022 cm-2 were observed at 20 wt% of lithium doping. Devices at this doping level showed the best characteristics. As the temperature was increased, the series resistance value decreased. Additionally, the activation energy was observed to change with respect to the component acting on the trap. We have demonstrated that lithium doping is an effective way to obtain a higher performance ZTO-based diode.
  • 67 View
  • 0 Download
Extraction of Threshold Voltage for Junctionless Double Gate MOSFET
Hak Kee Jung
J Korean Inst Electr Electron Mater Eng 2018;31(3):146-151.   Published online March 1, 2018
DOI: https://doi.org/10.4313/JKEM.2018.31.3.146
In this study, we compared the threshold-voltage extraction methods of accumulation-type JLDG (junctionless double-gate) MOSFETs (metal-oxide semiconductor field-effect transistors). Threshold voltage is the most basic element of transistor design; therefore, accurate threshold-voltage extraction is the most important factor in integrated-circuit design. For this purpose, analytical potential distributions were obtained and diffusion-drift current equations for these potential distributions were used. There are the ømin method, based on the physical concept; the linear extrapolation method; and the second and third derivative method from the Id-Vg relation. We observed that the threshold-voltages extracted using the maximum value of TD (third derivatives) and the ømin method were the most reasonable in JLDG MOSFETs. In the case of 20 nm channel length or more, similar results were obtained for other methods, except for the linear extrapolation method. However, when the channel length is below 20 nm, only the ømin method and the TD method reflected the short-channel effect.
  • 57 View
  • 0 Download
A Study on Characterization of P-N Junction Using Silicon Direct Bonding
Won-chae Jung
J Korean Inst Electr Electron Mater Eng 2017;30(10):615-624.   Published online October 1, 2017
DOI: https://doi.org/10.4313/JKEM.2017.30.10.615
This study investigated the various physical and electrical effects of silicon direct bonding. Direct bonding means the joining of two wafers together without an intermediate layer. If the surfaces are flat, and made clean and smooth using HF treatment to remove the native oxide layer, they can stick together when brought into contact and form a weak bond depending on the physical forces at room temperature. An IR camera and acoustic systems were used to analyze the voids and bonding conditions in an interface layer during bonding experiments. The I-V and C-V characteristics are also reported herein. The capacitance values for a range of frequencies were measured using a LCR meter. Direct wafer bonding of silicon is a simple method to fuse two wafers together; however, it is difficult to achieve perfect bonding of the two wafers. The direct bonding technology can be used for MEMS and other applications in three-dimensional integrated circuits and special devices.
  • 74 View
  • 0 Download
A Study on the Material Characteristics of the NiO/ZnO Ultraviolet Sensor Based on Solution Process
Seong-cheol Moon, Ji-seon Lee, Kyeong-jae No, Seong-ju Yang, Seong-eui Lee
J Korean Inst Electr Electron Mater Eng 2017;30(8):508-513.   Published online August 1, 2017
DOI: https://doi.org/10.4313/JKEM.2017.30.8.508
Ultraviolet (UV) photodetectors are used in various industries and fields of research, including optical communication, flame sensing, missile plume detection, astronomical studies, biological sensors, and environmental research. However, general UV detectors that employ Schottky junction diodes and p-n junctions have high fabrication cost and low quantum efficiency. In this study, we investigated the characteristics of materials used to manufacture UV photodetectors in a low-cost solution process that requires easy fabrication of flexible substrates. We fabricated p-type NiO and n-type ZnO substrates with wide band gap by the sol-gel method and compared the characteristics of substrates prepared under different spin-coating and heat-treatment conditions.
  • 63 View
  • 0 Download
Optimization of 4H-SiC Superjunction Accumulation MOSFETs by Adjustment of the Thickness and Doping Level of the p-Pillar Region
Young-seok Jeong, Sang-mo Kooa
J Korean Inst Electr Electron Mater Eng 2017;30(6):345-348.   Published online June 1, 2017
DOI: https://doi.org/10.4313/JKEM.2017.30.6.345
In this work, static characteristics of 4H-SiC SJ-ACCUFETs were obtained by adjusting the p-pillar region. The structure of this SJ-ACCUFET was designed by using a two-dimensional simulator. The static characteristics of SJ-ACCUFET, such as the breakdown voltages, on-resistance, and figure of merits, were obtained by varying the p-pillar doping concentration from 1×1015 cm-3 to 5×1016 cm-3 and the thickness from 0 μm to 9 μm. The doping concentration and the thickness of p-pillar region are closely related to the break down voltage and on-resistance and threshold voltages. Hence a silicon carbide SJ-ACCUFET structure with highly intensified breakdown voltages and low on-resistances with good figure of merits can be achieved by optimizing the p-pillar thickness and doping concentration.
  • 68 View
  • 0 Download
Study on 3.3 kV Super Junction Field Stop IGBT According to Design and Process Parameters
Ey Goo Kang
J Korean Inst Electr Electron Mater Eng 2017;30(4):210-213.   Published online April 1, 2017
DOI: https://doi.org/10.4313/JKEM.2017.30.4.210
In this paper, we analyzed the structural design and electrical characteristics of a 3.3 kV super junction FS IGBT as a next generation power device. The device parameters were extracted by design and process simulation. To obtain optimal breakdown voltage, we researched the breakdown characteristics. Initially, we confirmed that the breakdown voltage decreased as trench depth increased. We analyzed the breakdown voltage according to p pillar dose. As a result of the experiment, we confirmed that the breakdown voltage increased as p pillar dose increased. To obtain more than 3.3 kV, the p pillar dose was 5×1013 cm-2, and the epi layer resistance was 140 Ω. We extracted design and process parameters considering the on state voltage drop.
  • 60 View
  • 0 Download
A Study on the Selective Hole Carrier Extraction Layer for Application of Amorphous/crystalline Silicon Heterojunction Solar Cell
Yongjun Kim, Sunbo Kim, Youngkuk Kim, Young Hyun Cho, Chang-kyun Park, Junsin Yi
J Korean Inst Electr Electron Mater Eng 2017;30(3):192-197.   Published online March 1, 2017
DOI: https://doi.org/10.4313/JKEM.2017.30.3.192
Hydrogenated Amorphous Silicon (a-Si:H) is used as an emitter layer in HIT (heterojunction with Intrinsic Thin layer) solar cells. Its low band gap and low optical properties (low transmittance and high absorption) cause parasitic absorption on the front side of a solar cell that significantly reduces the solar cell blue response. To overcome this, research on CSC (carrier Selective Contacts) is being actively carried out to reduce carrier recombination and improve carrier transportation as a means to approach the theoretical efficiency of silicon solar cells. Among CSC materials, molybdenum oxide (MoOx) is most commonly used for the hole transport layer (HTL) of a solar cell due to its high work function and wide band gap. This paper analyzes the electrical and optical properties of MoOx thin films for use in the HTL of HIT solar cells. The optical properties of MoOx show better performance than a-Si:H and μc-SiOx:H.
  • 75 View
  • 0 Download
Enhancing Solar Cell Properties of Heterojunction Solar Cell in Amorphous Silicon Carbide
Hyun Sung Kim, Sang Ho Kim, Young Seok Lee, Yong Jun Kim, Vinh Ai Dao, Jun Sin Yi
J Korean Inst Electr Electron Mater Eng 2016;29(6):376-379.   Published online June 1, 2016
DOI: https://doi.org/10.4313/JKEM.2016.29.6.376
In this paper, the efficiency improvement of the heterojunction with intrinsic thin layer (HIT) solar cells is obtained by optimization process of p-type a-SiC:H as emitter. The optoelectronic of p-type a-SiC:H layers including the optical band-gap and conductivity under the methane gas content variation is conducted in detail. A significant increase in the Jsc by 1 mA/cm2 and Voc by 30 mV are attributed to enhanced photon-absorption due to broader band-gap of p-a-SiC:H and reduced band-offsets at p-side interface, respectively of HIT solar cells.
  • 55 View
  • 0 Download
NiO-transparent Metal-oxide Semiconductor Photoelectric Devices
Dong-kyun Ban, Wang-hee Park, Seong Wan Eun, Joon Dong Kim
J Korean Inst Electr Electron Mater Eng 2016;29(6):359-364.   Published online June 1, 2016
DOI: https://doi.org/10.4313/JKEM.2016.29.6.359
NiO serves as a window layer for Si photoelectric devices. Due to the wide energy bandgap of NiO, high optical transparency (over 80%) was achieved and applied for Si photoelectric devices. Due to the high the high mobility, the heterojunction device (Al/n-Si/SiO2/p-NiO/ITO) provide ultimately fast photoresponses of rising time of 38.33 μs and falling time of 39.25 μs, respectively. This functional NiO layer would provide benefits for high-performing photoelectric devices, including photodetectors and solar cells.
  • 57 View
  • 0 Download
ITO Nanowires-embedded Transparent Metal-oxide Semiconductor Photoelectric Devices
Hyunki Kim, Hong Sik Kim, Malkeshkumar Patel, Joondong Kima
J Korean Inst Electr Electron Mater Eng 2015;28(12):808-812.   Published online December 1, 2015
DOI: https://doi.org/10.4313/JKEM.2015.28.12.808
Highly optical transparent photoelectric devices were realized by using a transparent metal-oxide semiconductor heterojunction of p-type NiO and n-type ZnO. A functional template of ITO nanowires (NWs) was applied to this transparent heterojunction device to enlarge the light-reactive surface. The ITO NWs/n-ZnO/p-NiO heterojunction device provided a significant high rectification ratio of 275 with a considerably low reverse saturation current of 0.2 nA. The optical transparency was about 80% for visible wavelengths, however showed an excellent blocking UV light. The nanostructured transparent heterojunction devices were applied for UV photodetectors to show ultra fast photoresponses with a rise time of 8.3 mS and a fall time of 20 ms, respectively. We suggest this transparent and super-performing UV responser can practically applied in transparent electronics and smart window applications.
  • 56 View
  • 0 Download
The second-generation HTS wire its YBCO coated conductor is widely used in the superconducting power apparatus. The YBCO coated conductor uses the normal-superconducting junction to increase the transport capacity of superconducting power apparatus when it is applied. The normal-superconducting junction can be a cause of reducing the stability of the superconducting power apparatus when a fault current is applied. Thus, in this study we have conducted the effect analysing normal-superconducting junction for the fault current using transport current and quench resistance. From the experimental results when a fault current is applied, the effect on the normal-superconducting junction is reduced the larger the amplitude of the fault current and is helpful to maintain the thermal stability of the HTS wire.
  • 56 View
  • 0 Download