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접합 및 무접합 이중게이트 MOSFET에 대한 문턱전압 이동 및 드레인 유도 장벽 감소 분석

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Analysis of Threshold Voltage Roll-Off and Drain Induced Barrier Lowering in Junction-Based and Junctionless Double Gate MOSFET

Hak Kee Jung
J Electr Electron Mater 2019;32(2):104-109.
Published online: March 1, 2019
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An analytical threshold voltage model is proposed to analyze the threshold voltage roll-off and drain-induced barrier lowering (DIBL) for a junction-based double-gate (JBDG) MOSFET and a junction-less double-gate (JLDG) MOSFET. We used the series-type potential distribution function derived from the Poisson equation, and observed that it is sufficient to use n=1 due to the drastic decrease in eigenvalues when increasing the n of the series-type potential function. The threshold voltage derived from this threshold voltage model was in good agreement with the result of TCAD simulation. The threshold voltage roll-off of the JBDG MOSFET was about 57% better than that of the JLDG MOSFET for a channel length of 25 nm, channel thickness of 10 nm, and oxide thickness of 2 nm. The DIBL of the JBDG MOSFET was about 12% better than that of the JLDG MOSFET, at a gate metal work-function of 5 eV. It was also found that decreasing the work-function of the gate metal significantly reduces the DIBL.

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Analysis of Threshold Voltage Roll-Off and Drain Induced Barrier Lowering in Junction-Based and Junctionless Double Gate MOSFET
J Electr Electron Mater. 2019;32(2):104-109.   Published online March 1, 2019
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

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Include:
Analysis of Threshold Voltage Roll-Off and Drain Induced Barrier Lowering in Junction-Based and Junctionless Double Gate MOSFET
J Electr Electron Mater. 2019;32(2):104-109.   Published online March 1, 2019
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