Skip to main navigation Skip to main content
  • KIEEME

J Electr Electron Mater : Journal of Electrical and Electronic Materials

OPEN ACCESS
Search
Advanced Search
ABOUT
BROWSE ARTICLES
EDITORIAL POLICIES
FOR CONTRIBUTORS

Articles

Page Path

EEPROM 셀에서 폴리실리콘 플로팅 게이트의 도핑 농도가 프로그래밍 문턱전압에 미치는 영향

장성근, 김윤장

Effects of Doping Concentration in Polysilicon Floating Gate on Programming Threshold Voltage of EEPROM Cell

,
J Electr Electron Mater 2007;20(2):113-117.
Published online: February 1, 2007
  • 7 Views
  • 0 Download
  • 0 Crossref
  • 0 Scopus
prev next

Full Article

Download PDF Download PDF

Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

Format:

Include:

Effects of Doping Concentration in Polysilicon Floating Gate on Programming Threshold Voltage of EEPROM Cell
J Electr Electron Mater. 2007;20(2):113-117.   Published online February 1, 2007
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.
Format:
Include:
Effects of Doping Concentration in Polysilicon Floating Gate on Programming Threshold Voltage of EEPROM Cell
J Electr Electron Mater. 2007;20(2):113-117.   Published online February 1, 2007
Close

Related articles

ABOUT

BROWSE ARTICLES

EDITORIAL POLICIES

FOR CONTRIBUTORS

© The Korean Institute of Electrical and Electronic Materials Engineers.