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반도체 / 13-2-2 : 전기적 스트레스에 따른 Offset 구조를 갖는 n - 채널 다결정 실리콘 박막 트랜지스터의 특성 분석

변문기, 이제혁, 임동규, 백희원, 김영호

The Analysis of Characteristics on n-channel Offset - gated Poly-Si TFT's with Electrical Stress

M . G Byun, J . H Lee, D . G Lim, H . W Back, Y . H Kim
J Electr Electron Mater 2000;13(2):101-105.
Published online: February 1, 2000
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The Analysis of Characteristics on n-channel Offset - gated Poly-Si TFT's with Electrical Stress
J Electr Electron Mater. 2000;13(2):101-105.   Published online February 1, 2000
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.
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The Analysis of Characteristics on n-channel Offset - gated Poly-Si TFT's with Electrical Stress
J Electr Electron Mater. 2000;13(2):101-105.   Published online February 1, 2000
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