In parallel with the efforts to improve the device performance in modern integrated circuits, it is necessary to downscale their core components, field-effect transistors (FETs), generally gauged by their physical gate length. Upon such device scaling, the emergence of the short-channel effect impedes further scaling into the nanometer scale in the silicon VLSI (Very-Large-Scale-Integration) system. To address this issue, two-dimensional (2D) semiconductors, leveraging their atomically thin thickness and dangling-bond-free characteristics, are being highlighted as a material solution for future scaling technology without severe mobility degradation. Despite the expected ideal physical properties, 2D semiconductors have yet to realize their full potential owing to the limited development of integration technology. In this context, we survey and review the tailored van der Waals integration technologies for 2D FETs. In particular, we provide an in-depth study of both van der Waals integrated contact and dielectric methods along with an explanation of customized materials. In essence, this van der Waals integrationcentered approach will be a core strategy to implement the high-performance 2D transistors that meet the demand of FET miniaturization.

We investigated the microstructure, crystal structure, dielectric, and elecromechanical strain properties of lead-free BaTiO₃ (BT)-modified (Bi_1/2Na_1/2)TiO₃-SrTiO₃ (BNT-ST) piezoelectric ceramics. Samples were prepared by a conventional ceramic processing route. Temperature dependent dielectric properties confirmed that a phase transition from a nonergodic relaxor to an ergodic relaxor was induced when the BT concentration reached 1.5 mol%, interestingly, where the average grain size reached a maximum value of 4.5 μm. At the same time, enhanced electromechanical strain (S_max/E_max = 600 pm/V) was obtained. It is suggested that the induced ferroelectric-relaxor phase transition by the BT modification is responsible for the enhancement of electromechanical strain in 1.5 mol% BT-modified BNT-ST ceramics.

As the 4th industrial revolution based on ICT is progressing in the manufacturing field, interest in building smart factories that can be flexible and customized according to customer demand is increasing. To this end, it is necessary to maximize the efficiency of factory by performing an automated process in real time through a network communication between engineers and equipment to be able to link the established IT system. It is also necessary to collect and store real-time data from heterogeneous facilities and to analyze and visualize a vast amount of data to utilize necessary information. Therefore, in this study, four types of controllers such as PLC, Arduino, Raspberry Pi, and embedded system, which are generally used to build a smart factory that can connect technologies such as artificial intelligence (AI), Internet of Things (IoT), and big data, are configured. This study was conducted for the development of a program that can collect and store data in real time to visualize and manage information. For communication verification by controller, data communication was implemented and verified with the data log in the program, and 3D monitoring was implemented and verified to check the process status such as planned quantity for each controller, actual quantity, production progress, operation rate, and defect rate.

Bulk-sized PbTiO₃ (PT), which is widely known as a high-performance ferroelectric oxide but cannot be fabricated into a monolithic ceramic due to its high c/a ratio, was successfully prepared with a high tetragonality by partially substituting Ni ions for Pb ions using a solid-state reaction method. We found that Ni-doped PT was well-fabricated as a bulk monolith with a significant c/a ratio of ~1.06. X-ray diffraction on as-sintered and crushed samples revealed that NiTiO₃ secondary phase was present at the doping level of more than 2 at.%. Scanning electron microscopic study showed that NiTiO₃ secondary phase grew on the surface of PT specimens regardless of the doping level possibly due to the evaporation of Pb during sintering. We demonstrated that an unconventional introduction of Ni ions into A-site plays a key role on the fabrication of bulk PT, though how Ni ion functions should be studied further. We expect that this study contributes to a further development of displacive ferroelectric oxides with a high c/a ratio.

There are many difficulties in the applications of smart manufacturing technology in the era of the 4th industrial revolution. In this paper, a test bed was built to aim for acquiring smart manufacturing technology, and the test bed was designed to acquire basic technologies necessary for PLC (Programmable Logic Controller), HMI, Internet of Things (IoT), artificial intelligence (AI) and big data. By building a vehicle maintenance lift that can be easily accessed by the general public, PLC control technology and HMI drawing technology can be acquired, and by using cloud services, workers can respond to emergencies and alarms regardless of time and space. In addition, by managing and monitoring data for smart manufacturing, it is possible to acquire basic technologies necessary for embedded systems, the Internet of Things, artificial intelligence, and big data. It is expected that the improvement of smart manufacturing technology capability according to the results of this study will contribute to the effect of creating added value according to the applications of smart manufacturing technology in the future.

Abstract: We have fabricated schottky barrier diode (SBDs) using polar (c-plane) and non polar (a-, m-plane) n-type 6H-SiC wafers. Ni/SiC ohmic contact was accomplished on the backside of the SiC wafers by thermal evaporation and annealed for 20minutes at 950℃ in mixture gas (N(2) 90% + H(2) balanced). The specific contact resistance was 3.6×10-4 Ω㎝2 after annealing at 950℃. The XRD results of the alloyed contact layer show that formation of NiSi2 layer might be responsible for the ohmic contact. The active rectifying electrode was formed by the same thermal evaporation of Ni thin film on topside of the SiC wafers and annealed for 5 minutes at 500℃ in mixture gas (N(2) 90% + H(2) balanced). The electrical properties of SBDs have been characterized by means of I-V and C-V curves. The forward voltage drop is about 0.95 V, 0.8 V and 0.8 V for c-, a- and m-plane SiC SBDs respectively. The ideality factor (η) of all SBDs have been calculated from log(I)-V plot. The values of ideality factor were 1.46, 1.46 and 1.61 for c-, a- and m-plane SiC SBDs, respectively. The schottky barrier height (SBH) of all SBDs have been calculated from C-V curve. The values of SBH were 1.37 eV, 1.09 eV and 1.02 eV for c-, a- and m-plane SiC SBDs, respectively.