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Native-Vth MOSFET을 이용한 셀프-캐스코드 구조의 아날로그 성능 분석

이대환, 백기주, 하지훈, 나기열, 김영석

Analog Performance Analysis of Self-cascode Structure with Native-Vth MOSFETs

Dae Hwan Lee, Ki Ju Baek, Ji Hoon Ha, Kee Yeol Na, Yeong Seuk Kim
J Electr Electron Mater 2013;26(8):575-581.
Published online: August 1, 2013
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The self-cascode (SC) structure has low output voltage swing and high output resistance. In order to implement a simple and better SC structure, the native-Vth MOSFETs which has low threshold voltage (Vth) is applied. The proposed SC structure is designed using a qualified industry standard 0.18-㎛ CMOS technology. Measurement results show that the proposed SC structure has higher transconductance as well as output resistance than single MOSFET. In addition, analog building blocks (e.g. current mirror, basic amplifier circuits) with the proposed SC structure are investigated using by Cadence Spectre simulator. Simulation results show improved electrical performances.

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Analog Performance Analysis of Self-cascode Structure with Native-Vth MOSFETs
J Electr Electron Mater. 2013;26(8):575-581.   Published online August 1, 2013
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

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Analog Performance Analysis of Self-cascode Structure with Native-Vth MOSFETs
J Electr Electron Mater. 2013;26(8):575-581.   Published online August 1, 2013
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