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반응표면분석법에 의한 적층 칩 바리스터의 전기적 특성

윤중락, 정태석, 최근묵, 이석원

Electrical Properties of Multilayer Chip Varistors in the Response Surface Analysis

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J Electr Electron Mater 2007;20(6):496-501.
Published online: June 1, 2007
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Electrical Properties of Multilayer Chip Varistors in the Response Surface Analysis
J Electr Electron Mater. 2007;20(6):496-501.   Published online June 1, 2007
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

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Electrical Properties of Multilayer Chip Varistors in the Response Surface Analysis
J Electr Electron Mater. 2007;20(6):496-501.   Published online June 1, 2007
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