The self-cascode (SC) structure has low output voltage swing and high output resistance. In order to implement a simple and better SC structure, the native-Vth MOSFETs which has low threshold voltage (Vth) is applied. The proposed SC structure is designed using a qualified industry standard 0.18-㎛ CMOS technology. Measurement results show that the proposed SC structure has higher transconductance as well as output resistance than single MOSFET. In addition, analog building blocks (e.g. current mirror, basic amplifier circuits) with the proposed SC structure are investigated using by Cadence Spectre simulator. Simulation results show improved electrical performances.

This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using 0.13 ㎛ CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 ㏈, power consumption is 29 ㎼ and chip area is 75 ㎛ × 90 ㎛.