Skip to main navigation
Skip to main content
KIEEME
mobile search button
mobile menu button
Search
Advanced Search
ABOUT
ABOUT
Journal introduction
Aims and scope
Editorial board
Management team
Best practice
Subscription information
Contact us
BROWSE ARTICLES
All issues
Current issue
Most viewed
Most downloaded
Most cited
Search
Metrics
EDITORIAL POLICIES
Research ethics
Peer review policy
Copyright and open access policy
Article sharing policy
Archiving policy
Data sharing policy
Preprint policy
Crossmark policy
Advertising and sponsorship policy
Research misconduct-related regulations
FOR CONTRIBUTORS
Instructions for authors
Checklist
Copyright transfer agreement
Graphical abstract
E-SUBMISSION
ABOUT
Journal introduction
Aims and scope
Editorial board
Management team
Best practice
Subscription information
Contact us
BROWSE ARTICLES
All issues
Current issue
Most viewed
Most downloaded
Most cited
Search
Metrics
EDITORIAL POLICIES
Research ethics
Peer review policy
Copyright and open access policy
Article sharing policy
Archiving policy
Data sharing policy
Preprint policy
Crossmark policy
Advertising and sponsorship policy
Research misconduct-related regulations
FOR CONTRIBUTORS
Instructions for authors
Checklist
Copyright transfer agreement
Graphical abstract
Page Path
HOME
Search
Embedded memory
WHERE t1.sid in(parameter_dbtbl_keyword '%Embedded memory%') and t1.xml_status <> 99
1
results for
"Embedded memory"
Filter
Keywords
Embedded memory (1)
LDMOST (1)
Single polysilicon EEPROM (1)
Standard CMOS Logic process (1)
Publication year
2006 (1)
Keywords
Embedded memory (1)
LDMOST (1)
Single polysilicon EEPROM (1)
Standard CMOS Logic process (1)
Cancel
Close
authors
Cancel
Close
Publication Year
2006 (1)
Cancel
Close
Funded articles
Cancel
Close
"Embedded memory"
Single Polysilicon EEPROM Cell and High-voltage Devices using a 0.25 ㎛ Standard CMOS Logic Process
J Electr Electron Mater
2006;19(11):994-999.
Published online November 1, 2006
PDF
11
View
0
Download
First
Prev
Page
of 1
Next
Last
×
TOP