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"Charge trapping"

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"Charge trapping"

Improvement of Storage Performance by HfO2/Al2O3 Stacks as Charge Trapping Layer for Flash Memory- A Brief Review
Fucheng Wang, Simpy Sanyal, Jiwon Choi, Jaewoong Cho, Yifan Hu, Xinyi Fan, Suresh Kumar Dhungel, Junsin Yi
J Electr Electron Mater 2023;36(3):226-232.   Published online May 1, 2023
DOI: https://doi.org/10.4313/JKEM.2023.36.3.3
As a potential alternative to flash memory, HfO2/Al2O3 stacks appear to be a viable option as charge capture layers in charge trapping memories. The paper undertakes a review of HfO2/Al2O3 stacks as charge trapping layers, with a focus on comparing the number, thickness, and post-deposition heat treatment and γ-ray and white x-ray treatment of such stacks. Compared to a single HfO2 layer, the memory window of the 5-layered stack increased by 152.4% after O2 annealing at ±12 V. The memory window enlarged with the increase in number of layers in the stack and the increase in the Al/Hf content in the stack. Furthermore, our comparison of the treatment of HfO2/Al2O3 stacks with varying annealing temperatures revealed that an increased annealing temperature resulted in a wider storage window. The samples treated with O2 and subjected to various γ radiation intensities displayed superior resistance. and the memory window increased to 12.6 V at ±16 V for 100 kGy radiation intensity compared to the untreated samples. It has also been established that increasing doses of white x-rays induced a greater number of deep defects. The optimization of stacking layers along with post-deposition treatment condition can play significant role in extending the memory window.
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The GIDL Current Characteristics of P-Type Poly-Si TFT Aged by Off-State Stress
Donggi Shin, Kyungsoo Jang, Nguyen Thi Cam Phu, Heejun Park, Jeongsoo Kim, Joonghyun Park, Junsin Yia
J Electr Electron Mater 2018;31(6):372-376.   Published online September 1, 2018
The effects of off-state bias stress on the characteristics of p-type poly-Si TFT were investigated. To reduce the gate-induced drain leakage (GIDL) current, the off-state bias stress was changed by varying Vgs and Vds. After application of the off-state bias stress, the Vgs causing GIDL current was dramatically increased from 1 to 10 V, and thus, the Vgs margin to turn off the TFT was improved. The on-current and subthreshold swing in the aged TFT was maintained. We performed a technology computer-aided design (TCAD) simulation to describe the aged characteristics. The aged-transfer characteristics were well described by the local charge trapping. The activation energy of the GIDL current was measured for the pristine and aged characteristics. The reduced GIDL current was mainly a thermionic field-emission current.
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Characterization of Sandwiched MIM Capacitors Under DC and AC Stresses Al2O3-HfO2-Al2O3 Versus SiO2-HfO2-SiO2
Ho Young Kwak, Hyuk Min Kwon, Sung Kyu Kwon, Jae Hyung Jang, Hwan Hee Lee, Song Jae Lee, Sung Yong Go, Weon Mook Lee, Hi Deok Lee
J Electr Electron Mater 2011;24(12):939-943.   Published online December 1, 2011
In this paper, reliability of the two sandwiched MIM capacitors of Al2O3-HfO2-Al2O3 (AHA) and SiO2-HfO2-SiO2 (SHS) with hafnium-based dielectrics was analyzed using two kinds of voltage stress; DC and AC voltage stresses. Two MIM capacitors have high capacitance density (8.1 fF/μm2 and 5.2 fF/μm2) over the entire frequency range and low leakage current density of ∼1 nA/cm2 at room temperature and 1 V. The charge trapping in the dielectric shows that the relative variation of capacitance (ΔC/C0) increases and the variation of voltage linearity (α/α0) gradually decreases with stress-time under two types of voltage stress. It is also shown that DC voltage stress induced greater variation of capacitance density and voltage linearity than AC voltage stress.
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Fabrication and Device Performance of Tera Bit Level Nano-scaled SONOS Flash Memories
J Electr Electron Mater 2007;20(12):1017-1021.   Published online December 1, 2007
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