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"Analog"

Advancements in Capacitive Touch System and Stylus Technologies
Ha-min Lee, Seung-hoon Ko
J Electr Electron Mater 2024;37(5):465-475.   Published online September 1, 2024
DOI: https://doi.org/10.4313/JKEM.2024.37.5.1
Due to changes in the form factor of display panels and touch screen panels in various devices, capacitive touch systems have evolved to address various issues such as low power consumption, noise immunity, and small chip size. Furthermore, some devices have applications that use a stylus. Since the stylus operates similarly to a finger touch, it encounters similar issues. Recent research trends focus on addressing key issues such as noise, which is primarily caused by the self-capacitor formed between the display cathode and the touch screen panel. In this paper, Various research papers discussing methods to eliminate external noise will be reviewed. These advancements enhance noise immunity in touch systems, making it easier to use thinner and more flexible panels. These progress make touch technology more versatile and reliable in various applications.
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Analog Performance Analysis of Self-cascode Structure with Native-Vth MOSFETs
Dae Hwan Lee, Ki Ju Baek, Ji Hoon Ha, Kee Yeol Na, Yeong Seuk Kim
J Electr Electron Mater 2013;26(8):575-581.   Published online August 1, 2013
The self-cascode (SC) structure has low output voltage swing and high output resistance. In order to implement a simple and better SC structure, the native-Vth MOSFETs which has low threshold voltage (Vth) is applied. The proposed SC structure is designed using a qualified industry standard 0.18-㎛ CMOS technology. Measurement results show that the proposed SC structure has higher transconductance as well as output resistance than single MOSFET. In addition, analog building blocks (e.g. current mirror, basic amplifier circuits) with the proposed SC structure are investigated using by Cadence Spectre simulator. Simulation results show improved electrical performances.
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Macro Model of DWFG MOSFET for Analog Application and Design of Operational Amplifier
Ji Hoon Ha, Ki Ju Baek, Dae Hwan Lee, Kee Yeol Na, Yeong Seuk Kim
J Electr Electron Mater 2013;26(8):582-586.   Published online August 1, 2013
In this paper, a simple macro model of n-channel MOSFET with dual workfunction gate (DWFG) structure is proposed. The DWFG MOSFET has higher transconductance and lower drain conductance than conventional MOSFET. Thus analog circuit design using the DWFG MOSFET can improve circuit characteristics. Currently, device models of the DWFG MOSFET are insufficient, so simple series connected two MOSFET model is proposed. In addition, a two stage operational amplifier using the proposed DWFG MOSFET macro model is designed to verify the model.
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