One of the important issues for fabricating the microelectronic display devices such as FED, PDP, and VFD is to obtain a high vacuum level inside the panel. In addition, sustaining the initial high vacuum level permanently is also very important. In the conventional packing technology using a tabulation method, it is not possible to obtain a satisfiable vacuum level for a proper operation. In case of FED, the poor vacuum level results in the increase of operating voltage for electron emission from field emitter tips and an arcing problem, resultantly shortening a life time. Furthermore, the reduction of a sealing process time in the PDP production is veryimportant in respect of commercial product. The most probable method for obtaining the initial high vacuum level inside the space with such a miniature and complex geometry is a vacuum in-line sealing which seals two glass plates within a high vacuum chamber. The critical solution for the vacuum sealing is to develop a frit glass to avoid the bubbling or crack problems during the sealing process at high temperature of about 400℃ under the vacuum environment. In this study, the suitable frit power was developed using a mixture of vitreous and crystalline type frit powders, and a vacuum sealed CNT FED with 2 inch diagonal size was fabricated and successfully operated.
