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Super Juction MOSFET의 공정 설계 최적화에 관한 연구

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Regular Paper Optimal Process Design of Super Junction MOSFET

Ey Goo Kang
J Electr Electron Mater 2014;27(8):501-504.
Published online: August 1, 2014
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This paper was developed and described core-process to implement low on resistance whichwas the most important characteristics of SJ (super junction) MOSFET. Firstly, using process-simulation,SJ MOSFET optimal structure was set and developed its process flow chart by repeated simulation. Following process flow, gate level process was performed. And source and drain level process wassimilar to genral planar MOSFET, so the process was the same as the general planar MOSFET. Andthen to develop deep trench process which was main process of the whole process, after finishing photomask process, we developed deep trench process. We expected that developed process was necessary todevelop SJ MOSFET for automobile semiconductor.

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Regular Paper Optimal Process Design of Super Junction MOSFET
J Electr Electron Mater. 2014;27(8):501-504.   Published online August 1, 2014
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

Format:
Include:
Regular Paper Optimal Process Design of Super Junction MOSFET
J Electr Electron Mater. 2014;27(8):501-504.   Published online August 1, 2014
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