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J Electr Electron Mater : Journal of Electrical and Electronic Materials

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고전압 전력소자를 보호하기 위한 Sense FET 설계방법

경신수, 서준호, 김요한, 이종석, 강이구, 성만영

A Design Method on Power Sense FET to Protect High Voltage Power Device

Sin Su Kyoung, Jun Ho Seo, Yo Han Kim, Jong Seok Lee, Ey Goo Kang, Man Young Sung
J Electr Electron Mater 2009;22(1):12-16.
Published online: January 1, 2009
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A Design Method on Power Sense FET to Protect High Voltage Power Device
J Electr Electron Mater. 2009;22(1):12-16.   Published online January 1, 2009
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

Format:
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A Design Method on Power Sense FET to Protect High Voltage Power Device
J Electr Electron Mater. 2009;22(1):12-16.   Published online January 1, 2009
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