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"Vacuum gate spacer"

Device Optimization for Suppression of Short-Channel Effects in Bulk FinFET with Vacuum Gate Spacer
Ji-yeong Yeon, Khwang-sun Lee, Sung-su Yoon, Ju-won Yeon, Hagyoul Bae, Jun-young Park
J Electr Electron Mater 2022;35(6):576-580.   Published online November 1, 2022
DOI: https://doi.org/10.4313/JKEM.2022.35.6.6
Semiconductor devices have evolved from 2D planar FETs to 3D bulk FinFETs, with aggressive device scaling. Bulk FinFETs make it possible to suppress short-channel effects. In addition, the use of low-k dielectric materials as a vacuum gate spacer have been suggested to improve the AC characteristics of the bulk FinFET. However, although the vacuum gate spacer is effective, correlation between the vacuum gate spacer and the short-channel-effects have not yet been compared or discussed. Using a 3D TCAD simulator, this paper demonstrates how to optimize bulk FinFETs including a vacuum gate spacer and to suppress short-channel effects.
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