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"TSV backside passivation"

Characterization of Backside Passivation Process for Through Silicon via Wafer
Dong Hyun Kang, Jung Mo Gu, Young Don Ko, Sang Jeen Hong
J Electr Electron Mater 2014;27(3):137-140.   Published online March 1, 2014
With the recent advent of through silicon via (TSV) technology, wafer level-TSV interconnection become feasible in high volume manufacturing. To increase the manufacturing productivity, it is required to develop equipment for backside passivation layer deposition for TSV wafer bonding process with high deposition rate and low film stress. In this research, we investigated the relationship between process parameters and the induced wafer stress of PECVD silicon nitride film on 300mm wafers employing statistical and artificial intelligence modeling. We found that the film stress increases with increased RF power, but the pressure has inversely proportional to the stress. It is also observed that no significant stress change is observed when the gas flow rate is low.
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