There is an increasing demand for freeform stretchable display technologies capable of overcoming spatial limitations in next-generation platforms such as augmented reality (AR) and virtual reality (VR). To realize such stretchable displays, all constituent materials—including semiconductors, electrodes, insulators, and substrates—must exhibit sufficient mechanical elasticity. To date, stretchable gate insulators have primarily relied on organic polymers such as poly(4-vinylphenol-co-methyl methacrylate) (PVP-co-PMMA). However, their practical application is significantly limited by poor electrical properties, including low dielectric constant and instability. In this work, we propose a novel gate insulator structure that minimizes the use of solution-based processes, which often suffer from poor uniformity and may damage underlying layers during fabrication. The proposed structure integrates the advantages of both organic and inorganic materials by employing a hybrid configuration. Specifically, high-k HfO₂ thin films are deposited on both the top and bottom of an organic layer composed of PVP-co-PMMA, poly(melamine-co-formaldehyde) (PMF) as a crosslinking agent, and propylene glycol monomethyl ether acetate (PGMEA) as a solvent. This inorganic–organic–inorganic structure effectively compensates for the inherent electrical limitations of organic materials. As a result, the fabricated thin-film transistors (TFTs) exhibit improved electrical performance and reliability compared to devices employing a single organic gate insulator.

Boron nitride (BN) nanofibers were fabricated using BN nanoparticles (70 nm) by electrospinning. Morphologies such as the diameter and density of the BN nanofibers are strongly influenced by the viscosity and dispersion state of the precursor solution. In this study, the precursor solution was prepared by ball milling BN nanoparticles and polyvinylpyrrolidone (PVP, Mw~1,300,000) in ethanol, which was electrospun and then calcined to produce BN fibers. High-quality BN nanofibers were well fabricated at a BN concentration of 15 wt% with their diameters in the range of 500 nm to 800 nm; the viscosity of the precursor solution was 400 mPa·S. The calcination of the as-electrospun BN fibers seemed to be completed by holding them at 350℃ for 2 h considering the TGA data. The morphologies and phases of the BN fibers were investigated by scanning electron microscopy (SEM) and X-ray diffractometry (XRD), respectively; Fourier transform infrared (FT-IR) was also used for structure analysis.

Aluminum nitride fibers were synthesized by carbothermal reduction and nitridation of precursor fibers obtained by electrospinning. The starting materials used to synthesize the AlN fibers were Al(NO₃)₃·9H₂O and urea. Polyvinylpyrrolidone with increasing viscidity was used as the carbon source to obtain a composite solution. The mixed solution was drawn into a plastic syringe with a stainless steel needle, which was used as the spinneret and connected to a 20 kV power supply. A high voltage was supplied to the solution to facilitate the formation of a dense net of fibers on the collector. The precursor fibers were dried at 100℃ and then heated to 1,400℃ for 1 h in a microwave furnace under N2 gas flow for the carbothermal reduction and nitridation. X-ray diffraction studies indicated that the synthesized fibers consisted of the AlN phase. Field emission scanning electron microscopy studies indicated that the diameter of the calcined fibers was approximately 100 nm.

In this study, we fabricated the flexible pentacene TFTs with the polymer gate dielectric and contact printing method by using the silver nano particle ink as a source/drain material on plastic substrate. In this experiment, to lower the cross-linking temperature of the PVP gate dielectric, UV-Ozone treatment has been used and the process temperature is lowered to 90℃ and the surface is optimized by various treatment to improve device characteristics. We tried various surface treatments; O2 Plasma, hexamethyl-disilazane (HMDS) and octadecyltrichlorosilane (OTS) treatment methods of gate dielectric/semiconductor interface, which reduces trap states such as -OH group and grain boundary in order to improve the OTFTs properties. The optimized OTFT shows the device performance with field effect mobility, on/off current ratio, and the sub-threshold slope were extracted as 0.63 cm2 V-1s-1, 1.7 x 10(-6), and of 0.75 V/decade, respectively.