Post-metallization annealing (PMA) has been employed in silicon-based CMOS fabrication to enhance MOSFET reliability and performance. However, although deuterium annealing can reduce interface traps between the Si and SiO₂ gate dielectric, it remains insufficient to fully passivate these traps. In this context, a multiple PMA process, including additional hydrogen annealing, is proposed to further reduce dangling bonds. Silicon-based MOSFETs are fabricated to verify the proposed annealing process architecture. Electrical characterization of the threshold voltage (VTH), subthreshold swing (SS), on-state current (ION), and carrier mobility (μ_n) is conducted to investigate the impact of the multiple PMA. This study provides a guideline for PMA in MOSFET fabrication, with improvements in both performance and reliability.